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Original question:

WEBENCH® Tools/AM6546: Boundary scan for DDR4

WEBENCH® Tools/AM6546: AM6546

Jagrutee Asmar
Prodigy 120 points
Part Number: AM6546

Tool/software: WEBENCH® Design Tools

Hi TI team,

I have used latest given BSDL file for boundary scan testing.

Yet issue about DDR4 is not yet solved. Can you please Look in to this DDR4 section of the BSDL.

It showing DQS signals never toggle, which has to change its state.

Please do look into this on Priority basis.

Also we are are not able to test Ethernet IC which is  connected using MCU_RGMII.

Do we need additional BSDL file for boundary scan this Ethernet section.

We are testing AM6546 EVM board using boundary scan.

Here, We are able to test U31 and U88, which are connected using PRG2_RGMII_x interface.

But, we are not able to read PHY chip ID of U22 which is connected using MCU_RGMII interface.

 

Part Number

DP83867IRRGZ

DP83867IRRGZ

DP83867IRRGZ

Chip Reference Number

U22

U88

U31

Interface

RGMII_ETHERNET_PHY_MCU

PRG2_RGMII_2

PRG2_RGMII_1

PHY chip id

Not able to read ( Getting value as 0xFF)

Able to Read

Able to Read

RX clock detection

Not able to detect

Able to Detect

Able to Detect

Link Up/LinkDown activity

Not able to detect

Able to Detect

Able to Detect

Regards,

Jagrutee

  • 0
    TI__Guru 50732 points

    Jagrutree,

    I mentioned in the other thread that ... "There is a limitation such that the *DQS_N signal can only operate as "output3" function (output controlled by output enable)"

    That may affect how your tool controls the LPDDR protocol. 

    Re: the MCU_RGMII interface - can you check that basic BSDL input/output functionality is operating correctly?

    Thanks,
    Kyle

  • 0 in reply to kcastille
    Prodigy 120 points

    Hi Kyle,

    1) Please can you share any documentation regarding DDR4 operating in Boundary scan mode.

    You mentioned, about "output controlled by output enable" but in XJTAG boundary scan,I am not able to get this condition.

    If you are able share more details about this section, so i can implement it.

     

    2) MCU_RGMII interface. We able to check Input/Output functionality by Toggling pin.

    We are able to set high and low at MCU_RGMII side and able to see the transition on Ethernet side on oscilloscope.

    Still we are not able to read phy chip ID by boundary scan, Is above process is correct to check the input/output functionality?

    Regards,

    Kyle.

  • 0 in reply to Jagrutee Asmar
    TI__Guru 50732 points

    1) We don't have any documentation on using boundary scan to control specific functionality.  I will follow up with my design team on the specific question about "output controlled by output enable" and get back to you.

    In the meantime ... can you use functional testing for the DDR interface?  This is much more stressful than boundary scan since you can run at full speed whereas boundary scan is probably running in the MHz range.

    2) Yes for outputs that is what I suggested.  Are you also able to force one of the inputs to high/low and see that inside the IO on the SoC side.

    Thanks,

    Kyle

  • 0 in reply to kcastille
    Prodigy 120 points

    Hi Kyle,

    1) We have boot up the SD card on the EVM board, which leads to working DDR4.

    We didn't read and write on DDR4 manually. 

    we are waiting for your reply on current query.

    2) We are able read transition on SoC side as well, we have provided voltage manually at Ethernet chip side and monitor at SoC side.

    Yet we are not able read PHY chip ID. also we have use same ID as strapping provided in EVM board Schematic.

    we are waiting for your valuable response in this case.

    Regards,

    Jagrutee

  • 0 in reply to Jagrutee Asmar
    TI__Guru 50732 points

    1) We have run tests on our EVM on the DQS signal controllability.  We have found that for OUTPUT3 you need to make sure the corresponding CONTROL is set to 0.  Our BSDL tool automatically did this but maybe your test setup doesn’t.

    2) OK good to hear that the basic BSDL IO functionality is OK.

    For both of these issues, I recommend you follow up with your tool vendor to help debug.  We don't directly support using BSDL to emulate peripheral functionality.  This would need to come from your tool vendor.  If you find that the BSDL functionality isn't working correctly then certainly we can help with that. 

    Regards,

    Kyle

  • 0 in reply to kcastille
    Prodigy 120 points

    Hi Kyle,

    We are setting bit 12 of mode register 1 to "0" (Normal operation). We tried to toggle the DQS signal from XJTAG but we are not able to see any change, DQS signal is remain low only, we are not able to control this signal.  

    We want to know, where we can set the DQS signal mode to OUTPUT 3 ?

    Thanks,

    Jagrutee

  • 0 in reply to Jagrutee Asmar
    TI__Guru 50732 points

    Jagrutee,

    You'll need to follow up with your tool vendor to confirm.  We are able to toggle it successfully using Lauterbach.

    Regards,
    Kyle

  • 0 in reply to kcastille
    Prodigy 120 points

    Hi Kyle,

    I have shared this update with vendor, I need to verify one BSDL concern.

    We have used X6580AACD part no in our Board, Can we use same BSDL file by editing the Version in Current AM6546 BSDL?

    Or do we need different BSDL file and is DQS pin issue is updated in this new BSDL file.

    Thanks and regards,

    Jagrutee

     

  • 0 in reply to Jagrutee Asmar
    TI__Guru 50732 points

    Jagrutee,

    The X6580 is the preproduction part number for the AM6546 device.  The silicon is identical, and you can use the AM6546 BSDL file.

    Regards,
    Kyle