• State
  • Locked Locked
  • Replies 4 replies
  • Subscribers 99 subscribers
  • Views 364 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TDA2P-ACD: Screen Flicker when overlays are enabled

BenM
Expert 2220 points
Part Number: TDA2P-ACD

Hello,

I am using Vision SDK 3.06 using TDA2Px Linux + BIOS. I am driving three displays, a 1920x1080 at 60fps RGB  and two 800x480 at 60 fps YUV420. I am also using the display controller to blend ARGB overlays on the 1920x1080 display. The system works fine when I am not using overlays, however when overlays are enabled I see an occasional flicker/tear across the screen. I am certain that this tearing is happening on the display side, because the tear happens through the overlay and video data, so it occurs after the image is blended. I have seen similar artifacts in other situations when I have accidentally provided too large of a resolution to the display controller (the image starts to tear and artifacts appear), but in this situation I do not believe I am violating any limits. 

To fully isolate that enabling overlays is causing this I dynamically enable/disable the overlays by setting 0x580010a0 bit 0. When the Graphics pipeline is disabled the tearing stops, and when it is enabled it starts again. Do you have any idea what could cause this?

The flickering/tearing I am referring to occurs one frame every several seconds.

Best Regards,

Ben

  • 0
    TI__Guru**** 475755 points

    Hi Ben,

    I am sorry i did not get your data flow.  Do you mean you are using all 4 pipelines, 2 pipelines for 1080p resolutiokn with ARGB format for blending operation and other two for 800x480 resolution with YUV420 image format? All of them goes to the same display output? 

    It looks like DSS is not able to read in time, so can you please check if there is any underflow or sync lost interrupt from the DSS? This will tell us if issue is due to BW. 

    Also could you please check if mflag is enabled for all pipelines? If it is not enabled, there could potentially be underflow in heavily loaded system.

    Regards,

    Brijesh 

  • 0 in reply to Brijesh Jadav
    Expert 2220 points

    Hi Brijesh,

    Thanks for the response! We are driving 3 independent displays, the 1080p path has both camera data and the graphics pipeline being updated at 60fps, the other two displays are showing other cameras at 800x480 with no blending. 

    I checked the MFLAG, the individual ports are all set to zero which I think practically disables them, however I disabled mflag completely by setting 0x5800185C DISPC_GLOBAL_MFLAG_ATTRIBUTE to 0x0 to make sure. 

    You are correct, I am seeing synclost errors for HDMI output. You are also correct that the system is very busy, there is about 4.3GB/s of DDR traffic. Is there some way of giving the display DDR priority so that it does not underflow?

    Thanks,

    Ben

  • 0 in reply to BenM
    Expert 2220 points

    Brijesh,

    I have started reading a bit about MFLAG. What I couldn't find was an equivalent for the A15/GPU. Is there a way to lower the GPU DDR traffic priority? I think this would be the best place to deprioritize bandwidth.

    Thanks,

    Ben

  • 0 in reply to BenM
    TI__Guru**** 475755 points

    Hi Ben,

    Realtime traffic should get the highest priority, so please enable MFLAG for all pipelines to give higher priority to video pipelines.. 

    Rgds,

    Brijesh