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AM6548: Adding PCI-E problem

Artem Boyarchuk
Intellectual 370 points
Part Number: AM6548
Other Parts Discussed in Thread: CDCI6214

Hello.

We are developing a device based on the AM6548 SR2.0 processor

For development, we use the Linux SDK for AM65x 07_00_00_08.

In our device, we have a WiFi modem with a miniPCI-e interface. We made a circuit design based on the x2 Lane PCIe Personality Card

https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/791/PROC067E3_5F00_SCH.pdf

Clocking for Serdes0/1 is 100 MHz

We changed the evm.c file, added interface support via "SER-PCIE2LEVM","tqma654-pcie-usb2.dtbo".

In Linux, we detect the presence of a PCI-e bus

00:00.0 PCI bridge: Texas Instruments Device b00c (rev 01)

But there is no WiFi card detection (module is based on a BCM chip, which has Linux support).

During the test, we determined that there is no clocking on the connector (there is clocking only at a load of 50 Ohms, but these resistors are not in the reference design. The MPCIE_CLCK frequency is 25 MHz.

The MPCIE_TX output contains a detection signal, after the signal transmission begins, its level is very small (~200 mV pp).

Do we need an additional configuration to get the normal output state and detect the card, or are there cardinal differences in the operation of SR1.0 and SR 2.0?

  • 0
    TI__Mastermind 23125 points

    Artem, 

    The x2 PCIe card for the EVM have the option to use external (CDCI6214) refclk via resistor options, and default to use external refclk. Can you double check your minipci card is also supplying the refclk to the SERDES's?

    If so, can you check if the REFCLK is ticking before the PERST is deassertated as shown below as "3". This period need to be >100us, based on PCIe CEM spec. 

    I am not quite following your notes of "The MPCIE_CLCK frequency is 25 MHz", are you saying that REFCLK seen by the SERDES is 25MHz? If so can you confirm the resistor configurations to make sure REFCLK is not driven by SOC and external clkgen device simultaneously?

    Could you also confirm your mini-pcie card operate at Gen 2 speed? The SDK may be default to Gen 3, but the device is specified to support up to Gen 2 speed. 

    thanks

    Jian