In case of some emergency like exceptions we want to store some debugging info in some reset-proof area of the CPU.
DDR memory is not suitable because all memory is cleared after reset.
And also the internal static RAM we find no corner where the content is not overwritten by some
code or data from the early boot stages.
But: We don't need to have it power cycle-safe that means power supply is always assumed to be stable.
We need about 1k of reset-proof memory so single registers e.g. in the RTC are not sufficient.
thank you
