Part Number: 66AK2L06
Is it possible to receive PCIExpress_MSI_INTn (event number 17) Message signaled interrupt mode as specified in Figure 7-32 by ARM CorePac and C66x CorePac simultaneously?
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Hi,
From the datasheet of K2L,
What is the purpose to send the same interrupt to both ARM and DSP? You have two ISR to handle the enable/disable and end of the interrupt this may cause race conditions.
Regards, Eric