TDA4VMXEVM: DSI Pixel Clock // dss_display_test

Brahim Salh

Part Number: TDA4VMXEVM
Other Parts Discussed in Thread: USB2ANY

Dear experts,

I'm using DSS examples to test SerDes products using J721E evm. I'm using SDK 06.02.00.

I want to launch the test pattern though DSI FPD-Link, this is my configuration in dss_display_test.h header file:

The DSI FPD-Link output is connected to UH948 deserializer. When I launch the test with CCS, the deserializer is not locked that means it doesn't receive any data from serializer (UB941).

1) Do you have any idea what the problem could be?

I connected USB2ANY adapter to SDA1 and SCL1 of UB941, I can generate a pattern with Analog LaunchPAD, in this case the deserializer is locked and can see the patternon the screen but it doesn't work with DSS examples.

With USB2ANY, I read the pixel clock, it's 152 MHz

2) Do you know how to change pixel clock for DSI ?

I changed it in the code in dss_display_test.c but it stays always 152 Mhz.

thanks,

Brahim

over 5 years ago

0 KB over 5 years ago

TI__Guru*** 125351 points

Hi Brahim,

Please take a look at this thread https://e2e.ti.com/support/processors/f/791/t/931751?tisearch=e2e-sitesearch&keymatch=dss_display_test, and see if it addresses your questions.

Thanks,

0 Brahim Salh over 5 years ago in reply to KB

TI__Intellectual 1345 points

Hi Kb,

It was me on the other thread as well, the context is the same but the questions are different.

Thanks,

Brahim

0 KB over 5 years ago in reply to Brahim Salh

TI__Guru*** 125351 points

Thanks Brahim,

Hadn't noticed you were also the author there. As Brijesh had mentioned, a test setup is not currently available for this. Will see what I can find out.

Regards,

0 Brahim Salh over 5 years ago in reply to KB

TI__Intellectual 1345 points

Hi Kb,

I resolved the first questions, it was the SerDeConfig that was not right, I connected USB2ANY adapter to UB941 and copy the registers addresses and value from Analog LaunchPAD.

Now it's OK, the deserializer's Lock LED is ON and can see the pattern in the screen.

For the second question about the pixel, it's so strange because whatever the value I write in the code it always stay at 75 MHz when I measure it.

Best Regards,

Brahim

0 Brijesh Jadav over 5 years ago in reply to Brahim Salh

TI__Guru**** 485835 points

Brahim,

Are you using PDK example or vision apps?

I think the LCD that we supported for DSI output supports 75MHz. So the application code might be setting 75MHz pixel clock.

At around line 470 in the file psdk_rtos_auto_j7_07_00_00_11\pdk_jacinto_07_00_00\packages\ti\drv\dss\examples\dss_display_test\dss_display_test.c, driver example is settting pixel clock to 74.25MHz, can you try changing it?

Regards,

Brijesh

0 Brijesh Jadav over 5 years ago in reply to Brijesh Jadav

TI__Guru**** 485835 points

Hi Brahim,

As discussed over the call today, this could be coming due to PLL settings in UB941. So can you please check with SERDES team on how to change PLL of UB941?

Rgds,

Brijesh

0 Brahim Salh over 5 years ago in reply to Brijesh Jadav

TI__Intellectual 1345 points

Hi Brijesh,

As we discused, once the program is loaded via CCS and click on Resume (F8), it's asking in UART console to load the image RAW, that's why the following command must be entered in Scripting console and the press 1 in CCS console.

loadRaw(0x82000000, 0, " Path of PSP4_yuyv422_prog_packed_1280_800.yuv", 32, false);

Here is the output log of UART console:

And here is what is displayed on the screen:

I will post the answer about changing PLL when I get it.

Thanks,

Brahim

0 Brijesh Jadav over 5 years ago in reply to Brahim Salh

TI__Guru**** 485835 points

Hi Brahim,

Let us know if we can close this thread.

Rgds,

Brijesh

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TDA4VMXEVM: DSI Pixel Clock // dss_display_test