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TDA4VM: Information about Inter-domain/Inter-island communication

Andrzej Bodura
Prodigy 80 points
Part Number: TDA4VM

Hi TI team,

I am trying to figure out the communication between the MAIN, CPU, and WKUP domains. Unfortunately, apart from a short note in chapter 1.4, I am not able to find any other description of that aspect. Here is the mentioned note:

“Most communication between the MCU island and the rest of the SoC can (and, in a safety case, should) be conducted via internal SPI connections. These connections allow for safe communications to isolate the MCU island from faults in the rest of the SoC.”

Please, point me a place in the TRM document where I can find more detailed information about Inter-domain communication or provide me a separate document. I am especially interested in whether there are any means to access a memory connected to other domains – for example if A72 from MAIN Island can access NOR memory connected over OSPI to MCU Island or if R5F from MCU Island can access the eMMC memory related with the MAIN Island.

  • 0
    TI__Guru** 121331 points

    Hi Andrzej,

    The particular statement above on MCU island, is in regards to how MCU island should be setup for a safety case.   

    The full device system interconnect can be seen in TRM section 3 "System Interconnect".   Reference, Figure 3-1. "Device System Interconnect Overview", along with the table 3-10 CBASS0 Connectivity Matrix, to see the connections that are allowed by the device.

    In regards to eMMC example.  If the eMMC driver is running on the A72, then only the A72 would have access to that particular eMMC instance.   If the eMMC driver is running on the R5 (MCU R5 or Main R5), then only that R5 would have access to that eMMC instance.

    Memory regions can be configured to be shared and accessible by different cores as required.

    Regards,

    kb