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AM3352: Interface to Microchip KSZ9896C Ethernet Switch

Jim Kulyk
Prodigy 215 points
Part Number: AM3352
Other Parts Discussed in Thread: AMIC110,

We want to interface the AM3352 to the Microchip KSZ9896C Ethernet Switch and need confirmation on which interface options to use. The KSZ9896C has three options for Configuration Register Access: SPI and I2C for all internal registers (Switch and PHY) and MDC/MDIO for PHY registers. The interface type (SPI, I2C or MDC/MDIO) is selected by Configuration Straps that allow the KSZ9896C to detect which interface to use during power up from reset. The AM3352 has MDIO, SPI and I2C interfaces (Peripherals) on separate pins along with the RGMII interface. The current plan is to use the I2C interface on the KSZ9896C for all register access (Switch and PHY) along with the RGMII interface. This should allow complete access and communication with the KSZ9896C. However, in the AM335x and AMIC110 Sitara™ Processors Technical Reference Manual (Rev. Q), it states in "Table 26-31. Pins Used for EMAC Boot in RGMII Mode" that signals RGMII and MDC/MDIO are to be used. The question is do we need to implement both MDC/MDIO and I2C interfaces with the KSZ9896C? 

Best regards,

Jim

  • 0
    TI__Mastermind 28035 points

    Jim

    I'll need to get advice from our Ethernet expert on the MDC/MDIO requirements but, if booting through the Ethernet interface, the MDC/MDIO pins will be the only interface that can be used.

    Again, I'll need to confirm this, and either he or I will get back to you by Sept. 9th at the latest due to the US holiday. 

    --Paul

  • 0 in reply to PaulM
    Prodigy 215 points

    Thanks Paul.

  • 0 in reply to Jim Kulyk
    TI__Mastermind 28035 points

    Jim

    I'll need one more day to confirm.

    --Paul

  • 0
    TI__Mastermind 27890 points

    HI Jim,

    Paul is correct: for Ethernet boot this device relies on the MDIO interface exclusively for communication with the attached PHY.

    On that note, a quick review of the KSZ switch you referenced appears to indicate that it's upstream port is a MAC rather than a PHY. As you may already know, direct MAC-to-MAC connections are not supported on SItara-class devices. The MAC inside AM335x expects to be connected to a PHY on the other end of the RMII/RGMII/MII bus, not another MAC. In addition, the fact that you would like to boot from this interface further complicates matters as the AM335x boot ROM also expects to see an industry standard PHY register set accessible via MDIO. 

    If a switch is required, my suggestion would be to find one that presents a PHY (or PHY-like) interface on it's upstream port. It may also be possible to boot with such a switch, but I cannot say for sure as boot+switch functionality has never been evaluated or characterized for this device.

  • 0 in reply to -DK-
    Prodigy 215 points

    Hi DK and Paul,

    Thanks for the clarification. We'll review the options and determine what functionality is mandatory in this design - Ethernet boot may fall by the wayside.

    Best regards,

    Jim