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AM5728: AM5728/IPU/M4/Baremetal/Modify cmd file

wonjune kim
Intellectual 270 points

Part Number: AM5728

I am using AM5728 GP evm board.
I am using RTOS and the version is processor_sdk_rtos_am57xx_5_02_00_10.

I am trying to develop the IPU M4 with baremetal.
If i run the program with JTAG by modifying the memory and section in the cmd file, the following error is displayed.
I created a new project and ran a simple example(Display "Hello World").

"Cortex_M4_IPU1_C0: File Loader: Verification failed: Values at address 0xC0000000 do not match Please verify target memory and memory map."

This is the cmd file I modified.

I want to change the address of the section to the desired location. (  ex) 0xC0000000)
I would appreciate if you can tell me how.

Thanks.

  • 0
    TI__Guru 50045 points

    i am not able to download the CMD file.

    Can you just copy & paste the file content again? 

  • 0 in reply to Stanley Liu
    Intellectual 270 points

    Thank you for answer.

    This is the content of my cmd file.

    /****************************************************************************/
    /* AM57xx_CM4.cmd */
    /* Copyright (c) 2015 Texas Instruments Incorporated */
    /* Author: Rafael de Souza */
    /* */
    /* Description: This file is a sample linker command file that can be */
    /* used for linking programs built with the C compiler and */
    /* running the resulting .out file on the Cortex M4 core of */
    /* an AM57xx device. */
    /* Use it as a guideline. You will want to */
    /* change the memory layout to match your specific */
    /* target system. You may want to change the allocation */
    /* scheme according to the size of your program. */
    /* */
    /****************************************************************************/

    --retain='*(.intvecs)'
    --retain='*(.intc_text)'

    #ifdef MMU /* memory map with MMU turned on */

    MEMORY
    {
    IRAM: o = 0x00000000 l = 0x00001000 /* 4kB internal SRAM */
    OCMC_RAM1: o = 0x00300000 l = 0x00080000 /* 512kB L3 OCMC SRAM1 */
    OCMC_RAM2: o = 0x00400000 l = 0x00100000 /* 1MB L3 OCMC SRAM2 */
    OCMC_RAM3: o = 0x00500000 l = 0x00100000 /* 1MB L3 OCMC SRAM3 */
    DDR0: o = 0x80000000 l = 0x40000000 /* 1GB external DDR Bank 0 */

    /* ADD */

    DDR1: o = 0xC0000000 l = 0x40000000
    }

    #else /* memory map with MMU turned off */

    MEMORY
    {
    IRAM: o = 0x00000000 l = 0x00001000 /* 4kB internal SRAM */
    OCMC_RAM1: o = 0x40300000 l = 0x00080000 /* 512kB L3 OCMC SRAM1 */
    OCMC_RAM2: o = 0x40400000 l = 0x00100000 /* 1MB L3 OCMC SRAM2 */
    OCMC_RAM3: o = 0x40500000 l = 0x00100000 /* 1MB L3 OCMC SRAM3 */
    DDR0: o = 0x80000000 l = 0x40000000 /* 1GB external DDR Bank 0 */

    /* ADD */

    DDR1: o = 0xC0000000 l = 0x40000000
    }

    #endif

    SECTIONS
    {
    .intvecs: > DDR1
    .intc_text: > DDR1
    .text: > DDR1
    .const: > DDR1
    .cinit: > DDR1
    .init_array: > DDR1
    .data: > DDR1
    .bss: > DDR1
    .stack: > DDR1
    .sysmem: > DDR1
    }