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TMDX654IDKEVM: Synchronize EtherCAT Slave DC locally with SYNC0 of another ICSSG

Yury Rodzikau
Intellectual 305 points
Part Number: TMDX654IDKEVM

Dear TI Support Team,

 

I am working on a system that looks like the following:

More specifically, I am working on developing a custom Fieldbus protocol that has a Master/Slave communication model. Let's call it CustomProtocol.

The System consists of the following components:

  • The EtherCAT Master (TwinCAT) is the data supplier for processing.
  • The EtherCAT Slave is running on AM65x IDK. The Application Level is running on ARM Core 0 and firmware is running on ICSSG0. In certain configurations, EtherCAT Slave can act as Clock Master (Reference Clock) for the EtherCAT network.
  • CustomProtocol Master is also running on AM65x IDK. The Application Level is running on ARM Core 1 and firmware is running on ICSSG1. CustomProtocol Master is a Clock Master for its own network.
  • The data received by EtherCAT Slave are transmitted to the CustomProtocol Master via SharedMem.
  • The CustomProtocol Slave is the end consumer of data.

The EtherCAT cycle time is 1 msec and the CustomProtocol cycle time is 10 usec (100 times higher). Thus, EtherCAT Slave receives 100x Oversampled data, which then transferred via CustomProtocol to the Slaves.

I am currently working on synchronizing these two protocols and my main tasks is to Synchronize EtherCAT Slave's Clock (which optionally can operate as a Reference Clock) with the CustomProtocol's Clock.

I am currently reviewing the following document:

https://download.beckhoff.com/download/Document/io/ethercat-development-products/ethercat_esc_datasheet_sec1_technology_2i3.pdf

which states that:

and it is further stated that:

In my case, DC Source is the firmware that is running on a nearby ICSSG and I hope that it is possible to synchronize DC Destination without additional hardware (as described in the document above).

The Solution I am looking for should look like this:

In this regard, I would like to ask the following questions:

  • Does the implementation of EtherCAT Slave support synchronization with external Clock Source (DC Source) as it is stated in the document above?
  • Is it possible to configure interrupts so that SYNC0 of DC Source generates Latch0 interrupt of DC Destination?

I will be grateful for the ideas and links to the materials that could help me in solving this problem.

 

Kind Regards,

Yury.