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SmartReflex on DM3730EVM

Guru 10095 points
Other Parts Discussed in Thread: DM3730

Hi.
I would like to know about SmartReflex on DM3730EVM.
I am using dvsdk_4_00_00_22 and following this doc;  "UserGuidePowerMgmt PSP 03.00.00.05".

http://processors.wiki.ti.com/index.php/UserGuidePowerMgmt_PSP_03.00.00.05

The error message was appeared on the following setting.

- CPU clock of DM3730EVM is 1GHz.
- SmartReflex of VDD1 is enable.

 # echo 1> /sys/power/sr_vdd1_autocomp
 OPP4 doesn't support SmartReflex              <<<Error message

When CPU clock is 800MHz, there was no error message.

My questions are
1.  Is SmartReflex on DM3730EVM supported CPU clock; 1GHz?
2. 
If it supports CPU clock; 1GHz, how does it change the setting to be enable SmartReflex?
3. How can I check that SmartReflex works.


Regards,
Kanae

  • Kanae,

    SmartReflex kernel patches were not applied and tested during DVSDK 4.0 release, whereas these patches have been applied and verfied on DVSDK 4.01. Can you please try to migrate to 4.01.

    http://software-dl.ti.com/dsps/dsps_public_sw/sdo_sb/targetcontent/dvsdk/DVSDK_4_00/latest/index_FDS.html

    Thanks

    Brijesh

  • Kanae,

    Can you share this information from the board - when you try to enable smartreflex:
    1) $ cat /proc/cpuinfo
    2) Silicon revision. It is printed early when the kernel boots up.

    Specifically to your other question:

    kanae said:

    3. How can I check that SmartReflex works.

    SmartReflex allows minor adjustments in power consumption - to compensate for hot and cold silicons - making power measurements predictable.
    To really verify SmartReflex working you should be looking at the power measurements across spectrum of silicons.

    On your own EVM, you need to measure VDD1 - with and without SmartReflex enabled - with same application running (preferrably non-interactive). You will notice "small" change in voltage levels in both cases - if eFuse is blown with nValues corresponding to your current OPP.

  • 
    
    Dear Sanjeev, 
    Thank you for your reply.
    Here is the information from the board.
    <Silicon revision>
    CPU: ARMv7 Processor [413fc082] revision 2 (ARMv7), cr=10c53c7f
    <cpuinfo>
    root@dm3730-am3715-evm:~# cat /proc/cpuinfo
    Processor       : ARMv7 Processor rev 2 (v7l)
    BogoMIPS        : 998.84
    Features        : swp half thumb fastmult vfp edsp neon vfpv3
    CPU implementer : 0x41
    CPU architecture: 7
    CPU variant     : 0x3
    CPU part        : 0xc08
    CPU revision    : 2
    Hardware        : OMAP3 EVM
    Revision        : 0020
    Serial          : 0000000000000000

    If you need more information of our state, please let me know.
    Regards,  
    Kanae
  • Kanae,

    I am looking for AM37x silicon revision. The output on the terminal would look something like:

    OMAP3630/DM3730 ES1.0 (l2cache iva sgx neon isp 192mhz_clk )

    Edit: Attempt to correct a typo seems to have caused double post.

  • Kanae,

    I am looking for AM37x silicon revision. The output on the terminal would look something like:

    OMAP3630/DM3730 ES1.0 (l2cache iva sgx neon isp 192mhz_clk )

     

  • Dear Sanjeev,

    Thank you for pointing that out.
    Silicon revision is "OMAP3630/DM3730 ES1.0 (l2cache iva sgx neon isp 192mhz_clk )".
    This is same as your example.

    Reagards,
    Kanae

  • Dear Sanjeev,

    I would like to know how to check that SmartReflex works.

    My customer check the voltage of VDD_MPU_IVA and VDD_CORE.

    Result;
    When SmartReflex is enable by following commands,
    the voltage is lower 10-20% than SmartReflex is disable,
    however the voltage does not change with getting a load on DM3730
    such as a tempareture change, starting application and so on. 

    echo 1>   /sys/power/sr_vdd1_autocomp
    echo 1>   /sys/power/sr_vdd2_autocomp
     
    I suppose that SmartReflex technologies dynamically control voltage,
    frequency and power based on device activity.
    Is the avobe result technically correct?

    Regards,
    Kanae