CCS/OMAP-L138: In the subject of using the OMAPL138 development board to achieve embedded synchronous sampling, the fastest timing cycle is 11.8μs, and it can’t reach 10μs anyway.

user6435463

Part Number: OMAP-L138
Other Parts Discussed in Thread: OMAPL138

Tool/software: Code Composer Studio

Hello, I'm sorry to disturb you, we have some confusion and need your help and answers.

In the subject of using the OMAPL138 development board to implement embedded synchronous sampling, the sampling frequency requires 96K, and the timer 2 frequency is 228MHz. The theoretically calculated timing period is 10μs. After many experiments, we found that the fastest timing period is 11.8μs.

In the Code Composer Studio simulation software, we have optimized the program. In the timer interrupt program, the program is relatively simple, including clearing the interrupt flag and operating the I/O port to achieve the light on and off. After the program is streamlined, the timing cycle is still Not fast enough to meet our requirements.
Why is this? Quite confused, I hope to get your answers and help.

The timer interrupt program is as follows:

void TimerIsr(void)
{
int emif_rbuffer0, emif_rbuffer1, emif_rbuffer2, emif_rbuffer3, emif_rbuffer4, emif_rbuffer5, emif_rbuffer6, emif_rbuffer7;
// Clear interrupt flag
TimerIntStatusClear(SOC_TMR_2_REGS, TMR_INT_TMR12_NON_CAPT_MODE);

HWREG(SOC_GPIO_0_REGS + 0x14 + (0x28 * 0)) ^= 1;
HWREG(SOC_GPIO_0_REGS + 0x1C + (0x28 * 2)) = (1 << 29);
HWREG(SOC_GPIO_0_REGS + 0x18 + (0x28 * 2)) = (1 << 29);

emif_rbuffer0 = ((int *)SOC_EMIFA_CS2_ADDR)[0]; //Read the AD value of 8 channels
emif_rbuffer1 = ((int *)SOC_EMIFA_CS2_ADDR)[1]; //Read the AD value of 8 channels
emif_rbuffer2 = ((int *)SOC_EMIFA_CS2_ADDR)[2]; //Read the AD value of 8 channels
emif_rbuffer3 = ((int *)SOC_EMIFA_CS2_ADDR)[3]; //Read the AD value of 8 channels
emif_rbuffer4 = ((int *)SOC_EMIFA_CS2_ADDR)[4]; //Read the AD value of 8 channels
emif_rbuffer5 = ((int *)SOC_EMIFA_CS2_ADDR)[5]; //Read the AD value of 8 channels
emif_rbuffer6 = ((int *)SOC_EMIFA_CS2_ADDR)[6]; //Read the AD value of 8 channels
emif_rbuffer7 = ((int *)SOC_EMIFA_CS2_ADDR)[7]; //Read the AD value of 8 channels
if((emif_rbuffer0>=Sound_th)||(emif_rbuffer1>=Sound_th)||(emif_rbuffer2>=Sound_th)||(emif_rbuffer4>=Sound_th)||(emif_rbuffer6>=Sound_th)||(Sample_Start==1))
{
Sample_Start=1;
m0_data[data_count] = emif_rbuffer0;
m1_data[data_count] = emif_rbuffer1;
m2_data[data_count] = emif_rbuffer2;
m3_data[data_count] = emif_rbuffer3;
m4_data[data_count] = emif_rbuffer4;
data_count++;
if(data_count >= SAMPLENUMBER)
{

data_count = 0;
Sample_Start=0;
}
}
}

over 5 years ago

0 Rahul Prabhu over 5 years ago

TI__Guru** 116510 points

please help us understand your setup so we can help provide appropriate guidance. What is the Hardware and software used with your setup. What signal is being sample and how is the ADC connected to EMIF. If you have a block diagram that shows your setup, that may also help. Also help provide details on the theoretical estimates that you are claiming. Have you tried the same with simple GPIOs instead of EMIF IO port. EMIFA is an interface meant for aynchronous memory interface and FPGA and SRAM interface. Is there a reason to pick that interface for sampling signal.

Regards,

Rahul

0 user6435463 over 5 years ago in reply to Rahul Prabhu

Prodigy 25 points

Dear Rahul, thank you for your reply. Your reply is very inspiring to me. Here I will give you further explanations on your questions.

The hardware we use in the setup is the OMAPL138 processor, and the software we use is Code Composer Studio 9.2.0. The connection between ADC8568 and EMIFA is through pin connection, see the picture below for the specific connection method. In the timer interrupt program, only the I/O port is operated to turn on and off the LED. The timing period is not accurate. The timing period is set to 10.17μs, and the actual measurement result is 11.8μs.

The timer interrupt program is as follows:

data_count = 0;
Sample_Start=0;
}
}
}

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CCS/OMAP-L138: In the subject of using the OMAPL138 development board to achieve embedded synchronous sampling, the fastest timing cycle is 11.8μs, and it can’t reach 10μs anyway.