Please help determine max EMIF clock - documentation is ambiguous and lacks detail.
From SPRS457D, fig.3-2 - looks like AEMIF source clock is PLLC1SYSCLK4. Its max value from SPRS457D, table 3-4 is 135 MHz.
However, in SPRUFG5A, p.171 - AEMIF clock is referenced as PLLC1SYSCLK4/2. Which is exactly what I see when trying to access a NOR flash. If this is true, the maximum AEMIF clock is 67.5 MHz.
SPRUFI1 on the other hand has examples mentioning 100MHz EMIF clock. (Pp.43, 51).
Am I missing something?