TDA4VM: J7 in EP mode with independent clock

Hi,

this documents a J7 PCIe Endpoint setup

http://software-dl.ti.com/jacinto7/esd/processor-sdk-linux-jacinto7/latest/exports/docs/linux/Foundational_Components/Kernel/Kernel_Drivers/PCIe/PCIe_End_Point.html

There is a question we had regarding the PCIe reference clocks mentioned in the above EP setup.

In the guide, there’s a note indicating the root complex clocks must not be propagated to the endpoint.

Can you confirm what the J7 in EP mode will do if the RC does send a clock?

Will it cause an issue or will it be ignored on the J7 in EP mode as it appears to operate w/ an independent clock (SRIS)?

Regards,

--Gunter