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PROCESSOR-SDK-DRA7X: Any limitation in the vertical blanking of TDA2x DSS BT.656 output ?

ks
Intellectual 680 points
Part Number: PROCESSOR-SDK-DRA7X

Hi, 

Now we use the V blanking settings for BT656 output,

pVInfo->mInfo.vBackPorch = 2;

pVInfo->mInfo.vFrontPorch = 2;

But the screen was flashing sometimes, the situation like as video data shift. ( 2 times in 15 min)

If we modified pVInfo->mInfo.vBackPorch & pVInfo->mInfo.vFrontPorch to 110, this abnormal situation will disappear.

I just would like to know  what is limitation in the vertical blanking of TDA2x DSS BT.656 output.

What is Min value? 

Br,

KS

  • 0
    TI__Guru** 121101 points

    Hi KS,

    From a register programming perspective the minimal value that can be set for vertical blanking is 0, reference TRM, register(s). DISPC_TIMING_Hx. 

    What are the timing that are defined by the device/screen, on which the flashing is occurring?  The display timings / timing ranges defined there should be aligned with the timings being programmed on the TDA2x.

    Regards,

    kb