Sorry if this is a basic question but a customer is (in Linux tweaking device tree file) trying to configure the LCD controller on the AM335x to output in raster mode active TFT with active low Hsync and Vsync signals. Basically the below picture from p. 1952 of the TRM (AM335x_TRM_spruh73q).pdf . But the HSYNC signal is falling low almost 7 cycles before the Vsync and they need to be ~1 cycle. The "porch" settings seem to help with data getting driven but not the timing edge between HSYNC and VSYNC.
How do we control the LCDC timing edge between HSYNC and VSYNC?
