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EDMA on C6747 to slow for 10 MSPS?

You Jin
Prodigy 30 points
Other Parts Discussed in Thread: ADS1610

Hi All,

I am using a system composed of C6747 (300 MHz floating) and TI's ADS1610 (ADC, 10 MSPS). The 16 bit ADC output is directly conected to the GPIO bank 0 (GP0[0:15]). Data Ready of the ADC is triggering through GPIO bank 1 (set as Interrupt bank) the EDMA Event. PaRam is set as ring buffer. Everythink is working fine, but the problem is, that the EDMA seems to be to slow for the 10 MSPS of the ADC. That means it misses few samples outcoming from the ADC.

Before going in detail I have the general question if it is actually possible to run a 10 MSPS ADC through the EDMA of the C6747 (all Clocks set to max, so EDMA runs with 150 MHz). Doest somebody have experienze or can give an answer?

Regards

You Jin

  • 0
    TI__Guru*** 125430 points

    A more robust design would be to switch to the c6748 or c6746 and utilize the UPP to connect to your parallel A/D converter.  The UPP was designed for this exact purpose.

    There's nothing I can suggest in your current design to improve the situation.  In fact, performance may very well get worse depending on other system traffic, i.e. other EDMA transfers, contention for various internal buses due to other SCR bus masters, etc.

    Brad

  • 0 in reply to Brad Griffis
    Prodigy 30 points

    At this time there are no other EDMA transfers. I actually just started to configure the system. There is even no CPU code. For now the only DSP's task is to get the Date from the ADC.

    I am working with an EVM Board. The DSP is booting from NAND Flash which is connected to GPIO[0:7]. The ADC is parallely connected to GPIO[0:15]. Could this be a problem or the reason?

    What about UHPI (are the same Pins), is it perhaps faster?

     

    You Jin

  • 0 in reply to You Jin
    TI__Guru 62975 points

    I would agree with Brad here.  The GPIO interface was not optimized to sustain high speed data transfers.  HPI might be faster, but it (like EMIFA) is an asynchronous interface that would require quite a bit of glue logic to implement.