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TDA4VM: EP mode and ref clock with external Host RC

Gunter Schmer
Genius 14412 points

Part Number: TDA4VM

Hi,

a customer is testing with the following PCIe setup:

TI J7 EVM endpoint  < --- > External Host root complex

 

They are using the ADEX cable w/ where the refclks is not propagated through the cable.

In this configuration, the RC sees the TI endpoint, however there are a number of errors on the bus and unable to actually setup a datapath.

Below is the output from lspci for reference below.

 

We suspect that the RC and EP need to share the same clock. Does the EVM support using the clock from the RC when in endpoint mode?

# lscpi

0005:00:00.0 PCI bridge: Device 1ad0 (rev a1) (prog-if 00 [Normal decode])

                Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-

                Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR+ <PERR- INTx-

                Latency: 0

                Interrupt: pin A routed to IRQ 35

                Bus: primary=00, secondary=01, subordinate=ff, sec-latency=0

                Memory behind bridge: 40000000-411fffff

                Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-

                BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-

                                PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-

                Capabilities: [40] Power Management version 3

                                Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

                                Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

                Capabilities: [50] MSI: Enable- Count=1/1 Maskable+ 64bit+

                                Address: 0000000000000000  Data: 0000

                                Masking: 00000000  Pending: 00000000

                Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00

                                DevCap:                MaxPayload 256 bytes, PhantFunc 0

                                                ExtTag- RBE+

                                DevCtl:  Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+

                                                RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+

                                                MaxPayload 256 bytes, MaxReadReq 512 bytes

                                DevSta: CorrErr+ UncorrErr- FatalErr+ UnsuppReq- AuxPwr+ TransPend-

                                LnkCap: Port #0, Speed 8GT/s, Width x1, ASPM not supported, Exit Latency L0s <1us, L1 <64us

                                                ClockPM- Surprise+ LLActRep+ BwNot+ ASPMOptComp+

                                LnkCtl:  ASPM Disabled; RCB 64 bytes Disabled- CommClk-

                                                ExtSynch- ClockPM- AutWidDis- BWInt+ AutBWInt-

                                LnkSta:  Speed 5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt+ ABWMgmt+

                                RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible+

                                RootCap: CRSVisible+

                                RootSta: PME ReqID 0000, PMEStatus- PMEPending-

                                DevCap2: Completion Timeout: Range ABCD, TimeoutDis+, LTR+, OBFF Not Supported ARIFwd-

                                DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-

                                LnkCtl2: Target Link Speed: 8GT/s, EnterCompliance- SpeedDis-

                                                Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

                                                Compliance De-emphasis: -6dB

                                LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-, EqualizationPhase1-

                                                EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-

                Capabilities: [b0] MSI-X: Enable- Count=8 Masked-

                                Vector table: BAR=2 offset=00000000

                                PBA: BAR=2 offset=00010000

                Capabilities: [100 v2] Advanced Error Reporting

                                UESta:   DLP- SDES+ TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-

                                UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-

                                UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-

                                CESta:   RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-

                                CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+

                                AERCap:               First Error Pointer: 05, GenCap+ CGenEn- ChkCap+ ChkEn-

                Capabilities: [148 v1] #19

                Capabilities: [168 v1] #26

                Capabilities: [190 v1] #27

                Capabilities: [1c0 v1] L1 PM Substates

                                L1SubCap: PCI-PM_L1.2+ PCI-PM_L1.1+ ASPM_L1.2- ASPM_L1.1- L1_PM_Substates+

                                                  PortCommonModeRestoreTime=60us PortTPowerOnTime=40us

                                L1SubCtl1: PCI-PM_L1.2- PCI-PM_L1.1- ASPM_L1.2- ASPM_L1.1-

                                                   T_CommonMode=255us

                                L1SubCtl2: T_PwrOn=40us

                Capabilities: [1d0 v1] Vendor Specific Information: ID=0002 Rev=4 Len=100 <?>

                Capabilities: [2d0 v1] Vendor Specific Information: ID=0001 Rev=1 Len=038 <?>

                Capabilities: [308 v1] #25

                Capabilities: [314 v1] Precision Time Measurement

                                PTMCap: Requester:+ Responder:+ Root:+

                                PTMClockGranularity: 16ns

                                PTMControl: Enabled:- RootSelected:-

                                PTMEffectiveGranularity: Unknown

                Capabilities: [320 v1] Vendor Specific Information: ID=0004 Rev=1 Len=054 <?>

                Kernel driver in use: pcieport

 

0005:01:00.0 Unassigned class [ff00]: Texas Instruments Device b00d (rev ff) (prog-if ff)

                !!! Unknown header type 7f

Thanks,

--Gunter

  • 0
    TI__Mastermind 23125 points

    Gunter, 

    Could you clarify the lspci output messages are from the EVM or the external host?

    I am not able to decode all the messages from the lspci, but can you attach linux boot log from the EVM to me? wanted to see if link training ever finished? We can also directly check Link Status Register bits by directly reading registers from Linux console using "devmem2 _address_" utility. can send you register locations if you can not find them in the TRM. 

    I am not ready to suspect refclk issues yet, as the EVM has been verified working fine with distributed refclk architecture, where each of the RC and EP has their own refclk. 

    I am more interested to learn about the reset sequence, as well as interrupt configurations. 

    regards

    Jian