This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Question EMIF and SDRAM

Anonymous
Anonymous
Other Parts Discussed in Thread: TMS320DM6437

Hi All,

 

I would like to ask some questions on EMIF.

 

SPRU984a has its full name to be Asynchronous External Memory Interface, but VPFE document says CCDC should be connected via EMIF to SDRAM.

 

So is SDRAM (of which DDR2 is a special type), whose full name is Synchronous dynamic Random Access Memory, an asynchronous or synchronous device? Isn’t there any inconsistency here?

 

 

   

 

Thanks,

Zheng

  • I believe the term EMIF is in a generic sense, as in External Memory Interface, of which the DDR2/SDRAM Memory controller is one.  This is what is being suggested, not the Asynchronous EMIF.

  • Anonymous
    0 Anonymous in reply to BrandonAzbell

    So "asynchronous" in its title in SPRU984a, in this regard, is an improper prefix?

    Zheng

  • Zheng Zhao said:

    So "asynchronous" in its title in SPRU984a, in this regard, is an improper prefix?

    No, it is absolutely proper.

    The TMS320DM6437 has 2 physically separate and independent external memory interfaces, a DRAM interface as described in SPRU986 and the asynchronous memory interface as described in SPRU984.

  • Anonymous
    0 Anonymous in reply to BrandonAzbell

    Dear Brandon,

     

    So EMIFA (asynchronous) plays no role in the communication between VPFE and DDR2, and that VPFE requires only proper DDR2 connection to work?

       

          

        

     

    Nearly all of those EMIFA pins

    1.      Table 2-10. (58) EMIFA Terminal Functions (EMIFA Pinout Mode 1, AEM[2:0] = 001)

    2.      Table 2-11. (48) EMIFA Terminal Functions (EMIFA Pinout Mode 3, AEM[2:0] = 011)

    3.      Table 2-12. (17) EMIFA Terminal Functions (EMIFA Pinout Mode 4, AEM[2:0] = 100)

    4.      Table 2-13. (17) EMIFA Terminal Functions (EMIFA Pinout Mode 5, AEM[2:0] = 101)

    are multiplexed with GPIO (red number in parenthesis are pin count). So if I do not need some of these EMIFA pins, I can safely set GPIO as output and disconnect them (neither to high nor ground, just disconnect / connect to air), without affecting VPFE subsystem?

     

         

    Zheng