Other Parts Discussed in Thread: DRA829
Hi TI Team,
Does the latest Linux sdk support to config CPSW with RMII mode?
We use CPSW with RMII interface to DP83822 PHY on our custom board.
The SDK I use is ti-processor-sdk-linux-rt-am65xx-evm-07_00_01_07.
The Link Up/Down state is working well.
But I can't ping to PC successfully....
The dts as below
mcu_cpsw_pins_default: mcu_cpsw_pins_default {
pinctrl-single,pins = <
AM65X_WKUP_IOPAD(0x0058, PIN_OUTPUT, 1) /* (N4) MCU_RGMII1_TX_CTL.MCU_RMII1_CRS_DV */
AM65X_WKUP_IOPAD(0x005c, PIN_INPUT, 1) /* (N5) MCU_RGMII1_RX_CTL.MCU_RMII1_RX_ER */
AM65X_WKUP_IOPAD(0x0068, PIN_OUTPUT, 1) /* (M4) MCU_RGMII1_TD1.MCU_RMII1_TXD1 */
AM65X_WKUP_IOPAD(0x006c, PIN_OUTPUT, 1) /* (M5) MCU_RGMII1_TD0.MCU_RMII1_TXD0 */
AM65X_WKUP_IOPAD(0x0080, PIN_INPUT, 1) /* (M6) MCU_RGMII1_RD1.MCU_RMII1_RXD1 */
AM65X_WKUP_IOPAD(0x0084, PIN_INPUT, 1) /* (L6) MCU_RGMII1_RD0.MCU_RMII1_RXD0 */
AM65X_WKUP_IOPAD(0x0070, PIN_INPUT, 1) /* (N1) MCU_RGMII1_TXC.MCU_RMII1_TX_EN */
AM65X_WKUP_IOPAD(0x0074, PIN_INPUT, 1) /* (M1) MCU_RGMII1_RXC.MCU_RMII1_REF_CLK */
>;
};
mcu_mdio_pins_default: mcu_mdio1_pins_default {
pinctrl-single,pins = <
AM65X_WKUP_IOPAD(0x008c, PIN_OUTPUT, 0) /* (L1) MCU_MDIO0_MDC */
AM65X_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */
>;
};
&mcu_cpsw {
pinctrl-names = "default";
pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>;
cpts {
ti,pps = <3 1>;
};
};
&davinci_mdio {
reset-gpios = <&main_gpio1 15 GPIO_ACTIVE_LOW
&main_gpio1 17 GPIO_ACTIVE_LOW
>;
reset-delay-us = <20>; /* PHY datasheet states 1uS min */
phy0: ethernet-phy@0 {
reg = <1>;
};
};
&cpsw_port1 {
phy-mode = "rmii";
phy-handle = <&phy0>;
};
#define TS_OFFSET(pa, val) (0x4+(pa)*4) (0x80000000 | val)
×ync_router {
pinctrl-names = "default";
pinctrl-0 = <&mcu_cpts>;
/* Example of the timesync routing */
mcu_cpts: mcu_cpts {
pinctrl-single,pins = <
/* pps [cpts genf1] in13 -> out25 [cpts hw4_push] */
TS_OFFSET(25, 13)
>;
};
};
Any suggestion?
Thanks