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DM505: DESIGN REFERENCE DOCUMENTS AND SUPPORT FOR THIS CHIP

Collins Kong
Prodigy 90 points
Part Number: DM505
Other Parts Discussed in Thread: TDA3MD

Hi,

I am looking for a DSP with MIPI-CSI 2 lane interface. Seems DM505 is a good choice, but I cannot find any reference design documents on the Ti website, and the evaluation kit.

What I hope to find:

1. Evaluation kit;

2. Reference schematic design;

3. Software development kit and Tools.

One technical question here:

I need the raw data from the image sensor goes into the DDR thru MIPI-CSI interface directly, just bypass the ISP, and the data bandwidth will need 2.5Gbps.

See from the datasheet, the MIPI-CSI of DM505 can support 1.5G/lane, 2 lane allows up to 3Gbps data through-output. What about the VIP module? I don't need the ISP at all.

Best Regards

Collins

  • 0
    TI__Mastermind 46722 points

    Collins

    DM505 device has been decommissioned and is no longer available.  (I'll clean up the website to avoid confusion).

    You may be able to use DRA78x or TDA3x.  They are very similar to the DM505.

    Regards,

    Kyle

  • 0 in reply to kcastille
    Prodigy 90 points

    Hi Kyle,

    Thanks for your support.

    I cannot see the reference price of TDA3x and DRA7x. Anywhere it can have it?

    Best Regards

    Collins

  • 0 in reply to Collins Kong
    TI__Mastermind 46722 points

    Collins, You can contact the TI support center by clicking on the Contact TI link in the Ordering and Quality section:

    Regards,

    Kyle

  • 0 in reply to kcastille
    Prodigy 90 points

    Hi Kyle,

    Thanks.

    I will  contact local TI sales for the price.

    Still I have below question for TDA3MD

    1.

    I need the raw data from the image sensor goes into the DDR thru MIPI-CSI interface directly, just bypass the ISP, and the data bandwidth will need 2.5Gbps.

    See from the datasheet, the MIPI-CSI of DM505 can support 1.5G/lane, 2 lane allows up to 3Gbps data through-output. What about the VIP module? I don't need the ISP at all.

    2. What is the frequency of the TDA3x DSP?

    Thanks

  • 0 in reply to Collins Kong
    TI__Mastermind 46722 points

    Collins,

    Are you considering VIP as an alternative to CSI?  Since those are two different input paths... Referring to the device data sheet, VIP can run at <= 166 MHz, with an input data bus width of 8 to 16 bits.

    The Data Manual sections  Table 3-1. Device Comparison and  Table 5-1. Speed Grade Maximum Frequency show the speed grades.  This SoC supports up to 1 Ghz DSP.

    Regards,

    Kyle

  • 0 in reply to kcastille
    Prodigy 90 points

    Hi Kyle,

    Thanks for your support.

    I thought the MIPI-CSI interface was part of the VIP module. Please just focus on the MIPI-CSI 2.

    I need the raw data from the image sensor goes into the DDR thru MIPI-CSI interface directly, just bypass the ISP, and the data bandwidth will need 2.88Gbps from CSI to DDR.

    Is this possible for TDA3X series. Or what is the maximum bandwidth from CSI to DDR?

    About the DSP frequency, see from table 5-1, the 1GHz chip are TDA3XXS ones. But in the  package information section 10.1, only TDA3MASBABFQ1 and TDA3MASBABFRQ1 support 1GHz. Is this correct?

    Does TDA3MD has 1GHz option?

    Best Regards

    Collins

     

  • 0 in reply to Collins Kong
    TI__Mastermind 46722 points

    Collins,

    From the Technical Reference Manual: 

     CAL_A serves as sensor capture interface supporting MIPI CSI-2 protocol via external MIPI DPHY wtih 4 data lanes (up to 1.5 Gbps per lane), and providing data write DMA function.

    Yes, that can be supported to DDR.

    In the Data Manual, refer to the Device Comparison table to understand which parts can support which speed grades.  In Table 5-1, the XX is a place holder for the different part numbers.

    Yes, TDA3MD has a 1 GHz option.

    Regards,

    Kyle