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Compiler/DRA829V: Main Domain Timers not Halted in Emulation Mode

Hafiz Arslan Shabbir
Prodigy 55 points
Part Number: DRA829V
Other Parts Discussed in Thread: DRA829

Tool/software: TI C/C++ Compiler

We are using Dual-R5F (Main domain) of Dra829 with Lauterbach debugger, we want to freeze the timer in emulation mode.
For this purpose TIMER_TIOCP_CFG register EMUFREE value is set to 0.  But timers are continuously running in emulation mode.
Please suggest to us the possible way to halt the timers in emulation mode.

  • 0
    TI__Mastermind 23615 points

    Hello Arslan,

    There are two parts to freezing a timer (or other peripherals) when a core enters debug halt.  What you describe above takes care of the module side programming. The missing aspect is to link the peripheral to the core you want it to freeze. I do not believe TRACE32 currently provides the suspend linkage to make this transparent, so it would be necessary for you to add it into the CMM script you are using to setup debug. It is likely the version of the TRM you are using is missing this detail. I can try and relay that here and see about getting the TRM updated. There are some CMM scripts that TI makes available on our TDA4_DRA829 CDDS portal which does describe the linkage.

    In the DRA829 there exists an IP called a "Suspend Router".  This router is structured as an array of 128 4-byte ports (or slots). Each of the 128 entries can map to a peripheral. To associate a CPU's debug halt "suspend" signal with a peripheral it's necessary to write the CPU's index number into a peripheral's slot and set an enable bit.  On the peripheral side, you need to ensure it reacts to the suspend signal by configuring the EMUFREE bit.

    The suspend router can be accessed in either the system address @AXI:0x4C:0x3D300000 space or in the debugger configuration address space @APB:0x9D30000.

    The main domain timers main_0 to main_19 are mapped to slots 58 to 77. The mcu domain timers mcu_0 to mcu_9 are mapped to slots 89 through 98.

    I'll list an example for MCU domain timer0 (slot 89) below for halting with an R5 and the A72.  You can apply the logic for the main domain timers you want to stop into your CMM file.

    Suspend CPU mapping:
    ============================
    Suspend Router: @APB:0x9D30000 | @AXI:0x4C:0x3D300000

    CPU Suspend signal mappings:
    -------------------------------------------
    0 => unused
    1,2 => A72-0,A72-1
    9 => C7x
    17,18 => MCU-R50, MCU-R51
    19,20 => MAIN0-R50, MAIN0-R51
    21,22 => MAIN1-R50, MAIN1-R51
    23/24 => C660, C66

    Peripheral Outputs (0-127 port-indexes : slots):
    ---------------------------------------------------------------------------------
    MCU-TIMER0 is in slot 89  (89+1) x 4 = 360 = 0x168 
    @APB:0x9D300168 - debug address plane
    @AXI:0x4C:0x3D300168 - 64bit-system address

    stop timer if "MCU-R5-0" is halted write:
    Data.Set EAPB:0x9D300168 %LE %Long (0x10000|17.)
    or Data.Set AXI:0x4C:0x3D300168 %LE %Long (0x10000|17.)

    stop timer if "A72-0" is halted write:
    Data.Set EAPB:0x9D300168 %LE %Long (0x10000|1.)
    or Data.Set AXI:0x4C:0x3D300168 %LE %Long (0x10000|1.)

    In my TRACE32 setup, this does indeed work as expected.  It should work for you also.

    Regards,

    Richard W.