Hi Expert,
-1-
Customer is using MT53E768M32D4DT 3GB DDR on their TDA4 board, software is SDK7.0.
it is dual channel dual rank. each die is 768MB (density is 6Gb). Due to "ddrss_reg_control_tool" cannot support 6Gb density. so we have to select 4Gb density
and config DDR size to 2GB. with new ddr parameters, board can boot into SPL. but it will stuck in u-boot.
The question is how to change memory map for 2GB?
-2-
I am using TDA4VM EVM to simulate this case 4x512MB DDR. it will hang in u-boot "enable_caches()"
please help to check the below modification and boot log on TDA4EVM.
diff --git a/arch/arm/dts/k3-j721e-som-p0.dtsi b/arch/arm/dts/k3-j721e-som-p0.dtsi
index 5d18642fe6..4e89df70db 100644
--- a/arch/arm/dts/k3-j721e-som-p0.dtsi
+++ b/arch/arm/dts/k3-j721e-som-p0.dtsi
@@ -10,9 +10,9 @@
/ {
memory@80000000 {
device_type = "memory";
- /* 4G RAM */
- reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
- <0x00000008 0x80000000 0x00000000 0x80000000>;
+ /* 2G RAM 2 Rank 4x512MB */
+ reg = <0x00000000 0x80000000 0x00000000 0x40000000>,
+ <0x00000008 0x80000000 0x00000000 0x40000000>;
};
diff --git a/arch/arm/mach-k3/arm64-mmu.c b/arch/arm/mach-k3/arm64-mmu.c
index 95f830b7ff..809982abb6 100644
--- a/arch/arm/mach-k3/arm64-mmu.c
+++ b/arch/arm/mach-k3/arm64-mmu.c
@@ -93,13 +93,13 @@ struct mm_region j721e_mem_map[NR_MMU_REGIONS] = {
}, {
.virt = 0xbbc00000UL,
.phys = 0xbbc00000UL,
- .size = 0x44400000UL,
+ .size = 0x04400000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
PTE_BLOCK_INNER_SHARE
}, {
- .virt = 0x880000000UL,
+ .virt = 0xc0000000UL,
.phys = 0x880000000UL,
- .size = 0x80000000UL,
+ .size = 0x40000000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
PTE_BLOCK_INNER_SHARE
diff --git a/board/ti/j721e/evm.c b/board/ti/j721e/evm.c
index d9846f3c46..2d1407336a 100644
--- a/board/ti/j721e/evm.c
+++ b/board/ti/j721e/evm.c
@@ -42,7 +42,7 @@ int board_init(void)
int dram_init(void)
{
#ifdef CONFIG_PHYS_64BIT
- gd->ram_size = 0x100000000;
+ gd->ram_size = 0x80000000;
#else
gd->ram_size = 0x80000000;
#endif
@@ -65,14 +65,14 @@ int dram_init_banksize(void)
{
/* Bank 0 declares the memory available in the DDR low region */
gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
- gd->bd->bi_dram[0].size = 0x80000000;
+ gd->bd->bi_dram[0].size = 0x40000000;
gd->ram_size = 0x80000000;
#ifdef CONFIG_PHYS_64BIT
/* Bank 1 declares the memory available in the DDR high region */
gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE1;
- gd->bd->bi_dram[1].size = 0x80000000;
- gd->ram_size = 0x100000000;
+ gd->bd->bi_dram[1].size = 0x40000000;
+ gd->ram_size = 0x80000000;
#endif
------------------------------------------------------------------------------------------------------------------------
U-Boot SPL 2020.01-dirty (Oct 23 2020 - 11:40:11 +0800)
SYSFW ABI: 3.0 (firmware rev 0x0014 '20.04.1-v2020.04a (Terrific Lla')
j721e_ddrss_probe(dev=41c87cec)
j721e_ddrss_ofdata_to_priv(dev=41c87cec)
j721e_ddrss_power_on(ddrss=41cd7244)
LPDDR4_Probe: PASS
LPDDR4_Init: PASS
--->>> LPDDR4 Initialization is in progress ... <<<---
j721e_lpddr4_ack_freq_upd_req: received freq change req: req type = 1, req no. = 0
j721e_lpddr4_ack_freq_upd_req: received freq change req: req type = 0, req no. = 1
j721e_lpddr4_ack_freq_upd_req: received freq change req: req type = 1, req no. = 2
j721e_lpddr4_ack_freq_upd_req: received freq change req: req type = 0, req no. = 3
j721e_lpddr4_ack_freq_upd_req: received freq change req: req type = 1, req no. = 4
j721e_lpddr4_ack_freq_upd_req: received freq change req: req type = 2, req no. = 5
j721e_lpddr4_ack_freq_upd_req: received freq change req: req type = 1, req no. = 6
j721e_lpddr4_ack_freq_upd_req: received freq change req: req type = 2, req no. = 7
j721e_lpddr4_ack_freq_upd_req: received freq change req: req type = 1, req no. = 8
j721e_lpddr4_ack_freq_upd_req: received freq change req: req type = 2, req no. = 9
LPDDR4_Start: PASS
>>SPL: board_init_r()
TLB table from ffffc000 to 00000000
spl_init
Trying to boot from MMC2
Unsupported OS image.. Jumping nevertheless..
loaded - jumping to U-Boot...
rproc_pre_probe: 'r5f@5c00000': using fdt
k3_r5f_core_of_get_memories
memory atcm: bus addr 0x840029dc, mem size 0x8000, cpu_addr 0x5c00000, dev_addr 0x0
memory btcm: bus addr 0x840029ec, mem size 0x8000, cpu_addr 0x5c10000, dev_addr 0x41010000
ti_sci_proc_request: proc_id = 6
ti_sci_proc_get_status: proc_id = 6, boot_vector = 0xx, cfg_flags = 0x0, ctrl_flags = 0x200, sts = 0x0
ti_sci_proc_set_control: proc_id = 6, ctrl_set = 0x1, ctrl_clr = 0x0
ti_sci_proc_set_config: proc_id = 6, boot_vector = 0xx, cfg_set = 0x0, cfg_clr = 0x200
ti_sci_proc_release: proc_id = 6
rproc_pre_probe: 'r5f@5d00000': using fdt
k3_r5f_core_of_get_memories
memory atcm: bus addr 0x84000ccc, mem size 0x8000, cpu_addr 0x5d00000, dev_addr 0x0
memory btcm: bus addr 0x84000cdc, mem size 0x8000, cpu_addr 0x5d10000, dev_addr 0x41010000
ti_sci_proc_request: proc_id = 7
ti_sci_proc_get_status: proc_id = 7, boot_vector = 0xx, cfg_flags = 0x0, ctrl_flags = 0x200, sts = 0x0
ti_sci_proc_set_control: proc_id = 7, ctrl_set = 0x1, ctrl_clr = 0x0
ti_sci_proc_set_config: proc_id = 7, boot_vector = 0xx, cfg_set = 0x0, cfg_clr = 0x200
ti_sci_proc_release: proc_id = 7
rproc_pre_probe: 'a72@0': using fdt
Loading Environment from MMC... *** Warning - No MMC card found, using default environment
rproc_load: Loading to 'r5f@5c00000' from address 0x88000000 size of 4254052 bytes
ti_sci_proc_request: proc_id = 6
ti_sci_proc_power_domain_on: dev_id = 245
k3_r5f_da_to_va, num_mems = 2
===2 va = 0x5c00000, da = 0x0, dev_addr = 0x0, size = 0x6d8, mem_size = 0x8000
Loading phdr 0 to 0x5c00000 (1752 bytes) from src 0x88000040
k3_r5f_da_to_va, num_mems = 2
===3 da = 0xa1100000
Loading phdr 1 to 0xa1100000 (140 bytes) from src 0x88001000
k3_r5f_da_to_va, num_mems = 2
===3 da = 0xa1102000
Loading phdr 2 to 0xa1102000 (0 bytes) from src 0x88002000
k3_r5f_da_to_va, num_mems = 2
===3 da = 0xa205e680
Loading phdr 3 to 0xa205e680 (2032784 bytes) from src 0x88002000
k3_r5f_da_to_va, num_mems = 2
===3 da = 0xa2250000
Loading phdr 4 to 0xa2250000 (0 bytes) from src 0x881f4000
k3_r5f_da_to_va, num_mems = 2
===3 da = 0xa23a0000
Loading phdr 5 to 0xa23a0000 (1361264 bytes) from src 0x881f4000
k3_r5f_da_to_va, num_mems = 2
===3 da = 0xa24ec580
Loading phdr 6 to 0xa24ec580 (839936 bytes) from src 0x88340580
k3_r5f_da_to_va, num_mems = 2
===3 da = 0xa267b280
Loading phdr 7 to 0xa267b280 (0 bytes) from src 0x8840d680
ti_sci_proc_set_config: proc_id = 6, boot_vector = 0xx, cfg_set = 0x0, cfg_clr = 0x0
ti_sci_proc_release: proc_id = 6
_rproc_ops_wrapper: Starting r5f@5c00000...
ti_sci_proc_request: proc_id = 6
ti_sci_proc_set_control: proc_id = 6, ctrl_set = 0x0, ctrl_clr = 0x1
ti_sci_proc_release: proc_id = 6
Remoteproc 2 started successfully
** File not found /lib/firmware/j7-main-r5f0_1-fw **
_rproc_ops_wrapper: Resetting r5f@5c00000...
** File not found /lib/firmware/j7-mcu-r5f0_0-fw **
rproc_load: Loading to 'a72@0' from address 0x70000000 size of 512 bytes
Starting ATF on ARM64 core...
_rproc_ops_wrapper: Starting a72@0...
Shutting down...
NOTICE: BL31: v2.3():07.00.00.005-dirty
NOTICE: BL31: Built : 14:33:55, Jun 17 2020
U-Boot SPL 2020.01-dirty (Oct 23 2020 - 12:11:11 +0800)
SYSFW ABI: 3.0 (firmware rev 0x0014 '20.04.1-v2020.04a (Terrific Lla')
SPL malloc() before relocation used 0x3468 bytes (13 KB)
>>SPL: board_init_r()
TLB table from ffff4000 to 100000000
spl_init
Detected: J7X-BASE-CPB rev E2
Detected: J7X-VSC8514-ETH rev E2
Trying to boot from MMC2
Jumping to U-Boot
loaded - jumping to U-Boot...
image entry point: 0x80800000
initcall: 00000000808a4b78
U-Boot 2020.01-dirty (Oct 23 2020 - 12:11:11 +0800)
initcall: 0000000080817344
U-Boot code: 80800000 -> 808ED570 BSS: -> 8090B250
initcall: 00000000808174b0
initcall: 00000000808029e0
SoC: J721E SR1.0
initcall: 0000000080817b90
Model: Texas Instruments K3 J721E SoC
Board: J721EX-PM1-SOM rev E2
initcall: 0000000080817490
DRAM: initcall: 000000008080319c
initcall: 0000000080817694
Monitor len: 0010B250
Ram size: 80000000
Ram top: 100000000
initcall: 000000008081713c
initcall: 0000000080817150
TLB table from ffff0000 to ffffc000
initcall: 0000000080817578
initcall: 0000000080817580
initcall: 00000000808172dc
Reserving 1068k for U-Boot at: ffee4000
initcall: 00000000808172a0
Reserving 32896k for malloc() at: fdec4000
initcall: 0000000080817434
Reserving 168 Bytes for Board Info at: fdec3f58
initcall: 0000000080817588
initcall: 0000000080817264
Reserving 368 Bytes for Global Data at: fdec3de8
initcall: 00000000808171dc
Reserving 47776 Bytes for FDT at: fdeb8348
initcall: 0000000080817590
initcall: 0000000080817598
initcall: 00000000808175b8
initcall: 0000000080817710
initcall: 00000000808031c4
initcall: 00000000808175c4
RAM Configuration:
Bank #0: 80000000 1 GiB
Bank #1: 880000000 1 GiB
DRAM: 2 GiB
initcall: 00000000808171b8
New Stack Pointer is: fdeb8330
initcall: 00000000808173f0
initcall: 00000000808175a0
initcall: 00000000808175a8
initcall: 0000000080817378
Relocation Offset is: 7f6e4000
Relocating to ffee4000, new gd at fdec3de8, sp at fdeb8330
initcall: 00000000ffefb7e4
initcall: 00000000ffefb7ec
initcall: 0000000080817a18 (relocated to 00000000ffefba18)
function "0000000080817a18" is "initr_caches"
Could you please help to check?
Regards
Joe