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TDA2EG-17: DDR configure

gg yang
Expert 1200 points
Part Number: TDA2EG-17

Hi，

SDK： ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03

uboot：

VERSION = 2016
PATCHLEVEL = 05

In the DDR configuration file avatar_ EMIF_ RegisterConfigt.xlsm If the "leveling technique:" s / W "in" is set to HW, why can't there be any output and start? If it is set to SW, uboot can start normally.

I have compared the differences between HW and SW in the following aspects:

Sw:

.emif_ Rd_ Wr_ lvl_ rmp_ ctl = 0x00000000,

.emif_ ddr_ phy_ ctlr_ 1_ init = 0x0E24400F,

Hw:

.emif_ Rd_ Wr_ lvl_ rmp_ ctl = 0x80000000,

.emif_ ddr_ phy_ ctlr_ 1_ init = 0x0824400F,

Is tda2eg-17 supported HW ？

  • 0
    Expert 1200 points

    micron MT41K256M16
    Configuration production

    　 　 　 　
    const struct ctrl_ioregs DRA71x_DDR3L_532MHz_Yazaki_19K2_V0P1_ctrl_ioregs = { 　 　 　
        .ctrl_ddr3ch = 0x80808080, 　 　 　
        .ctrl_ddrch = 0x40404040, 　 　 　
        .ctrl_ddrio_0 = 0x00094A40, 　 　 　
        .ctrl_ddrio_1 = 0x00000000, 　 　 　
        .ctrl_lpddr2ch = 0x00404000 　 　 　
        .ctrl_emif_sdram_config_ext = 0x0000C123 　 　 　
    }; 　 　 　
    　 　 　 　
    const struct dmm_lisa_map_regs DRA71x_DDR3L_532MHz_Yazaki_19K2_V0P1_dmm_regs = { 　 　 　
        .dmm_lisa_map_0 = 0x00000000, 　 　 　
        .dmm_lisa_map_1 = 0x00000000, 　 　 　
        .dmm_lisa_map_2 = 0x80600100, 　 　 　
        .dmm_lisa_map_3 = 0xFF020100, 　 　 　
        .is_ma_present = 0x1 　 　 　
    }; 　 　 　
    　 　 　 　
    const struct emif_regs DRA71x_DDR3L_532MHz_Yazaki_19K2_V0P1_emif_regs = { 　 　 　
        .sdram_config_init = 0x62823332, 　 　 　
        .sdram_config = 0x62823332, 　 　 　
        .sdram_config2 = 0x00000000, 　 　 　
        .ref_ctrl = 0x000040F1, 　 　 　
        .ref_ctrl_final = 0x0000081D, 　 　 　
        .sdram_tim1 = 0xCEEF36ED, 　 　 　
        .sdram_tim2 = 0x408F802C, 　 　 　
        .sdram_tim3 = 0x40BF88A7, 　 　 　
        .read_idle_ctrl = 0x00050000, 　 　 　
        .zq_config = 0x5007190B, 　 　 　
        .temp_alert_config = 0x00000000, 　 　 　
        .emif_rd_wr_lvl_rmp_ctl = 0x80000000, 　 　 　
        .emif_rd_wr_lvl_ctl = 0x00000000, 　 　 　
        .emif_ddr_phy_ctlr_1_init = 0x0824400E, 　 　 　
        .emif_ddr_phy_ctlr_1 = 0x0E24400E, 　 　 　
        .emif_rd_wr_exec_thresh = 0x00000305, 　 　 　
    #ifdef EMIF_ECC_CTRL_REG_ECC_EN_MASK 　 　 　
        .emif_ecc_ctrl_reg = 0x00000000, 　 　 　
        .emif_ecc_address_range_1 = 0x3FFF0000, 　 　 　
        .emif_ecc_address_range_2 = 0x00000000, 　 　 　
    #endif 　 　 　
    }; 　 　 　

    There is no ECC   ,no defne EMIF_ECC_CTRL_REG_ECC_EN_MASK  。
    Why can't uboot boot when HW is opened?

  • 0 in reply to gg yang
    TI__Mastermind 38340 points

    Hi,

    Yes, hardware leveling is supported.

    I am closing this thread since this issue is duplicated in the following thread:

    e2e.ti.com/.../3516458