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TMDX654IDKEVM: How to read/write data with the PRU_ICSSG XFR2VBUS Hardware Accelerator

Part Number: TMDX654IDKEVM

Environment:

pdk_am65xx_1_0_7

ASM for PRU

 

Dear TI Support Team,

I am currently studying the possibility of transferring data between PRU and ARM using the XFR2VBUS Accelerator. My goal is to implement kind of memcpy function on ASM that can copy data of arbitrary size between different regions in ICSSG RAM, SRAM and DDR memory using XFR2VBUS Hardware Accelerator.

 

Unfortunately, section 6.4.6.3.1 PRU_ICSSG XFR2VBUS Hardware Accelerator in TRM (Literature Number: SPRUID7D) doesn't answer some questions, so I would like to clarify them here.

 

Question 1:

Do I need to initialize the XFR2VBUS accelerator somehow before I start using it?

 

Question 2:

The documentation contains chapters

  • 6.4.6.3.1.2 Read Operation with Auto Disabled
  • 6.4.6.3.1.3 Read Operation with Auto Enabled
  • 6.4.6.3.1.4 Write Operation with Auto Disabled

But there is no chapter on Write Operation with Auto Enabled.

Does this mean that Write Operation with Auto Enabled is not supported or is it just not described in the documentation?

 

Question 3:

Chapter 6.4.6.3.1.6 of XFR2VBUS Programming Model describes the sequence of operations for Write:

 

Write:

- Wait WR_BUSY = 0h

- XOUT 64 Byte data and 6 Byte address OR

- XOUT 64 Byte data (it will use the old address and increment by 0x40 for that data phase) OR

- XOUT 32 Byte/8 Byte/4 Byte/1 Byte data and 6 Byte address OR

- XOUT 32 Byte (it will use the old address and increment by 0x20 for that data phase)

 

Do I understand correctly that two consecutive XOUT operations without address change will be executed as Write Operation with Auto Enabled?

 

Do I need to perform any additional operations to switch the Auto Enabled/Auto Disabled mode for Write operation?

 

Question 4:

Does the Write Auto Enabled mode work when writing 1/4/8 bytes of data?

 

Question 5:

In several examples, I have seen the following macros for the Write implementation

 

m_xfr2vbus_write32 .macro xid, addr_low, addr_high

   ldi32 r10, addr_low

   ldi r11.w0, addr_high

   xout xid, &r2, 40

   .endm

 

m_xfr2vbus_write64 .macro xid, addr_low, addr_high

   ldi32 r18, addr_low

   ldi r19.w0, addr_high

   xout xid, &r2, 72

   .endm

 

These macros work perfectly. But if I change the following lines in macros:

 

m_xfr2vbus_write32: xout xid, &r2, 40 -> xout xid, &r2, 32

m_xfr2vbus_write64: xout xid, &r2, 72 -> xout xid, &r2, 64

 

they do not work.

 

Why do I have to specify a length of 40 for 32 bytes to be written and a length of 70 for 64 bytes to be written?

How will the xout command look like to write 1/4/8 bytes of data (What should be the argument length for xout command to write 1/4/8 bytes)?

Question 6:

TRM Table 6-385. Write Commands

When writing 64 bytes, R17 will contain the payload (data to be written).

Then what do the following records in the Table 6-385. Write Commands mean:

 

64 Byte Mode (Implied if R17.b3 enable is true)

64 Byte Mode (Implied if R17.b3 enable is false)?

 

Thank you in advance!

 

Kind regards,

Yury.