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TDA4VM: Question about the MCU watchdog management

Andrzej Bodura
Prodigy 80 points
Part Number: TDA4VM

Hi,

In the note that is placed in chapter 4.2.3 of TRM, it is mentioned that MCU_RTI0 is used as a watchdog timer during the booting process and that SYSFW "will manage the watchdog timer during run time." My grasp of this statement is that SYSFW shall regularly kick the watchdog during the normal operation. Is it correct?

If my understanding of the SYSFW role is correct, how can the MCU_RTI0 detect MCU Island malfunctions during normal operation?

 

Best Regards,

Andrzej

  • 0
    TI__Guru* 77804 points

    Hi Andrzej,

    I am checking this with the team and provide a response in a day.

    Regards,

    Karan

  • 0
    TI__Guru* 77804 points

    Hi Andrzej,

    I think from the TRM - "The customer-provided MCU image needs to load and install the TI-provided SYSFW image into the DMSC, which will manage the watchdog timer during run time."

    • DMSC/M3 do not use RTI in the MCU domain for watchdog functionality. It has it’s own RTI, which is different from MCU_RTI0.
    • Yes DMSC would service the watchdog timer. If this timer lapses, SoC would be reset. The DMSC has it’s own WDG timer and will not rely on MCU_RTI0. 

    Andrzej Bodura said:
    My grasp of this statement is that SYSFW shall regularly kick the watchdog during the normal operation. Is it correct?

    When DMSC – gets stuck or stalled, DMSC watchdog will reset SoC.

    Andrzej Bodura said:
    If my understanding of the SYSFW role is correct, how can the MCU_RTI0 detect MCU Island malfunctions during normal operation?

    When MCU1_0 get stuck or stalled, we can use MCU_RTI0 to do the below:

    1. Generate an interrupt OR
    2. Strobe an external pin (mcu_error) via ESM. Now, the PMIC could be used to monitor this line and then reset SoC.

    Regards,

    Karan