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DSPlink readwrite example and memory allocation questions.

Other Parts Discussed in Thread: OMAP3530

I use OMAPL137 and test DSPlink readwrite example OK, however  further experiments confused me and list below:

1. Where do the DSP executeable will be put on?

According to "CFG_OMAPL1XXGEM_SHMEM.c", the dsp memory allocation is from 0xC3E0-0000 and size is 0xFFF80, do it means the PROC_load will automatically put DSP binary from 0xC3E0-0000? If I use Linux toolchain (not using CCS3.3), how do I check to see it load at the right address?

2. How to call proc_read/write to get maximum available data of DSPLink memory area? Do I need to call once  to allcate full data area? or just call if I want?

If I run the example readwrite, I got following result.

"./readwritegpp readwrite.out 3287613440 1024 10". OK

If I change the buffersize from 1024 to a large number, say 400000, it crashes. More results are below:

"./readwritegpp readwrite.out 3287613440 400000 10". Arm-Linux crash. It dumps some data...(3287613440 = 0x C3F5-0000)

"./readwritegpp readwrite.out 3287613440 360000 10". OK.

"./readwritegpp readwrite.out 3286257792 360000 10". Arm-Linux hangs. (3286257792 = 0xC3E0-5080)

From wiki I know the default DSPLink is 1MB and can be checked according to "CFG_OMAPL1XXGEM_SHMEM.c", it says the DSPLink is put into 3 parts, "DSPLINKMEM", "DSPLINKMEM1" and "POOLMEM", allocated each from 0xC3E0-5080, 0xC3E3-0080 and 0xC3F0-0080, each size is 0x5000, 0x2B000 and 0x000D-0000 (totally 1MB). Can some one tell me how to use the function properly?

  • Calvin

    Which version of DSPLink are you on? DSPLink executable is loaded in to DDR memory section. DSPLINKMEM and DSPLINKMEM1 are for DSPLink internal control structures whereas POOLMEM is for DSPLink POOL memory for shared buffers. You cannot use PROC_read and PROC_write in these memory sections as you will overwrite the control structures or pool config causing crash. You need to specify a different section for PROC_read and PROC_write as detailed in the link below.

    The crashes could also be happening because the addresses and size that you are giving in point 2 may be overlapping with Linux.

    Have you seen this link http://processors.wiki.ti.com/index.php/Writing_DSPLink_Application_using_PROC_read_and_write_APIs Please go through this link to understand how to change memory map to ensure that you set aside sufficient memory and size for PROC_read and PROC_write.

    Deepali

     

     

  • Dear Deepali:

     I used DSPLink 1.61.01. DSP/BIOS: 5.33.03 on OMAPL137. The SDRAM size is 128MB. In boot arguments, it reserves 100MB for Linux, so it may set 28M maximum for DSP & DSPLink.

     I read the wiki already and know the configuration.  As mentioned the configuration file only specify 2MB for DSPand DSPlink, from 0xC3E0-0000. But I fond that for the example readwrite, different parameters about the starting address  and buffer size may cause program crash (core dump) or hangs, though I think they are within the POOLMEM area. The POOLMEM area is reserved for 832KB ( size = 0x000D-0000), however I can not make use all of them. For example if I set the starting address is 3287613440 (=0xC3F5-0000), the maximum buffer size is around 360000B, if larger than the value, say 400000B, it will cause core dump. If I change the starting address as 3287285888 (=C3F-0080) the availabe buffer size will be much smaller to avoid core dump. I think there are some rules to specify the address and the available buffer size. Is there is any segment alignment  rule for starting address or buffer size we should obey, where can I find it?

  • Calvin

    Have you created separate sections for PROC_read / PROC_write? Do you see any issues in the  start address and size then?

    It is not recommended to use DSPLINKMEM, POOLMEM for PROC_read/PROC_write. There is no limit on the size. You can set the size of the memory segment and use it for PROC_read/PROC_write.

    Deepali

  • Dear Deepali:

    According your suggestion, I follow the wiki to add two sections for  pool read/write. I can now make large data transfer for about 1MB data transfer ( but hangs for 2MB data transfer) .With this configuration I run again the other examples in side the dsplink package and I got following messages, do it means there is still something wrong ?

    Another question: As you can see I make the DSPLink large enough (total 8M = 1M+1M+2M+2M+2M for each segment), do I need and how to change the configuration to make dsplink handle more messages?

     

    ./messagemultigpp messagemulti.out 1024 10
    ======= Sample Application : MESSAGEMULTI App [10] =======
    App [10]: Entered MESSAGEMULTI_Create ()
    App [10]: gppMsgqName [GPPMSGQ10]
    App [10]: dspMsgqName [DSPMSGQ10]
    App [10]: PROC_setup status [0x8000]
    App [10]: PROC_attach status [0x8000]
    App [10]: POOL_open MQT_POOL_ID status [0x8000]
    App [10]: MSGQ_open status [0x8000]
    App [10]: PROC_load status [0x8000]
    App [10]: PROC_start status [0x8000]
    App [10]: POOL_open App Pool status [0x8000]
    App [10]: MSGQ_transportOpen status [0x8000]
    App [10]: NOTIFY_register status [0x8000]
    App [10]: NOTIFY_notify status [0x8000]

    App [10]: Leaving MESSAGEMULTI_Create ()
    App [10]: Entered MESSAGEMULTI_Execute ()
    App [10]: Transferred 100 messages
    App [10]: Transferred 200 messages
    App [10]: Transferred 300 messages
    App [10]: Transferred 400 messages
    App [10]: Transferred 500 messages
    App [10]: Transferred 600 messages
    App [10]: Transferred 700 messages
    App [10]: Transferred 800 messages
    App [10]: Transferred 900 messages
    App [10]: Transferred 1000 messages
    App [10]: Leaving MESSAGEMULTI_Execute ()
    App [10]: Entered MESSAGEMULTI_Delete ()
    App [10]: MSGQ_release status [0x8000]
    App [10]: MSGQ_transportClose status [0x800d]
    App [10]: NOTIFY_unregister status [0x8000]
    App [10]: PROC_stop status [0x8000]
    App [10]: MSGQ_close status [0x8000]
    App [10]: POOL_close App Pool status [0x800d]
    App [10]: POOL_close MQT_POOL_ID status [0x800d]
    App [10]: PROC_detach status [0x8009]

    App [10]: PROC_destroy status [0x8008]

    App [10]: Leaving MESSAGEMULTI_Delete ()
    ================================================

    ./ringiogpp ringio.out 10240 10
    ========== Sample Application : RING_IO ==========
    Bytes to transfer :128
    Data buffer size  :10240
    Entered RING_IO_Create ()
    Leaving RING_IO_Create ()
    Entered RING_IO_WriterClient ()
    Entered RING_IO_ReaderClient ()
    GPP-->DSP:Sent Data Transfer Start Attribute
    GPP-->DSP:Sent Data Transfer Start Notification
    GPP-->DSP:Total Bytes Transmitted  128
    RingIO_setAttribute succeeded to set the  RINGIO_DATA_END. Status = [0x8100]
    GPP-->DSP:Sent Data Transfer End Attribute
    GPP-->DSP:Sent Data Transfer End Notification
    Leaving RING_IO_WriterClient ()
    GPP<--DSP:Received Data TransferStart Attribute
    GPP<--DSP:Received Data TransferEnd Attribute
    GPP<--DSP:Bytes Received 128
    GPP<--DSP:Received Data Transfer End Notification
    Leaving RING_IO_ReaderClient ()
    Entered RING_IO_Delete ()
    Leaving RING_IO_Delete ()
    ====================================================

     

     

    The configuration file is as following:

     

    /** ============================================================================
     *  @file   CFG_OMAPL1XXGEM_SHMEM.c
     *
     *  @path   $(DSPLINK)/config/all/
     *
     *  @desc   Defines the configuration information for DSP/BIOS LINK for the
     *          OMAP-L1xx platform.
     *
     *  @ver    1.61.01
     *  ============================================================================
     *  Copyright (c) Texas Instruments Incorporated 2002-2008
     *
     *  Use of this software is controlled by the terms and conditions found in the
     *  license agreement under which this software has been supplied or provided.
     *  ============================================================================
     */


    /*  ----------------------------------- DSP/BIOS LINK Headers       */
    #include <dsplink.h>
    #include <procdefs.h>


    #if defined (__cplusplus)
    EXTERN "C" {
    #endif /* defined (__cplusplus) */


    /** ============================================================================
     *                                DSPLINK MEMORY SECTION DIAGRAM
     *
     *         |--------------[ 0xXXXXXX00 ]---------------------------------|
     *         |                                                             |
     *         |                   RESET VECTOR (0x80)                       |
     *         |               Last two nibbles must be zero                 |
     *         |                                                             |
     *         |-------------------------------------------------------------|
     *         |                                                             |
     *         |                   DSP CODE/DATA                             |
     *         |               DSP executable is loaded to this section      |
     *         |                                                             |
     *         |=============================================================|
     *         |                                                             |
     *         |                   DSPLINK SHARED MEMORY0                    |
     *         |               Shared control structure is loaded here       |
     *         |                                                             |
     *         |-------------------------------------------------------------|
     *         |                                                             |
     *         |                   DSPLINK SHARED MEMORY1                    |
     *         |               Shared control structure is loaded here       |
     *         |                                                             |
     *         |-------------------------------------------------------------|
     *         |                                                             |
     *         |                   POOL Buffer Memory                        |
     *         |               Pool's buffers are created in this area       |
     *         |                                                             |
     *         |-------------------------------------------------------------|
     *
     *  ============================================================================
     */

    /** ============================================================================
     *  @name   DRVHANDSHAKEPOLLCOUNT
     *
     *  @desc   POLL Count for Driver handshake.
     *  ============================================================================
     */
    #define  DRVHANDSHAKEPOLLCOUNT        ((Uint32) -1u)

    /** ============================================================================
     *  @name   RESETCTRLADDR
     *
     *  @desc   Indicates the start address of Reset Ctrl memory region.
     *          last two nibbles must be zero i.e. align to 256 boundary.
     *  ============================================================================
     */
    #define  RSTENTRYID         0
    #define  RESETCTRLADDR      0xC2000000
    #define  RESETCTRLSIZE      0x80

    /** ============================================================================
     *  @name   CODEMEMORYADDR/CODEMEMORYSIZE
     *
     *  @desc   Indicates startaddress/size for dsplink code region.
     *  ============================================================================
     */
    #define  CODEENTRYID        1
    #define  CODEMEMORYADDR     (RESETCTRLADDR + RESETCTRLSIZE)
    #define  CODEMEMORYSIZE     0x7FFF80u

    /** ============================================================================
     *  @name   SHAREDENTRYID/SHAREDMEMORYADDR/SHAREDMEMORYSIZE
     *
     *  @desc   Indicates startaddress/size for dsplink shared memory region.
     *  ============================================================================
     */
    #define  SHAREDENTRYID0     2
    #define  SHAREDMEMORYADDR0  (CODEMEMORYADDR + CODEMEMORYSIZE)
    #define  SHAREDMEMORYSIZE0  0x100000

    /** ============================================================================
     *  @name   SHAREDENTRYID/SHAREDMEMORYADDR/SHAREDMEMORYSIZE
     *
     *  @desc   Indicates startaddress/size for dsplink shared memory region.
     *  ============================================================================
     */
    #define  SHAREDENTRYID1     3
    #define  SHAREDMEMORYADDR1  (SHAREDMEMORYADDR0 + SHAREDMEMORYSIZE0)
    #define  SHAREDMEMORYSIZE1  0x100000

    /** ============================================================================
     *  @name   POOLMEMORYADDR/POOLMEMORYSIZE
     *
     *  @desc   Indicates startaddress/size for dsplink POOL memory region.
     *  ============================================================================
     */
    #define  POOLENTRYID        4
    #define  POOLMEMORYADDR     (SHAREDMEMORYADDR1 + SHAREDMEMORYSIZE1)
    #define  POOLMEMORYSIZE     0x200000u


    /** ============================================================================
     *  @name   POOLWRITEADDR/POOLWRITESIZE
     *
     *  @desc   Indicates startaddress/size for dsplink POOL memory region.
     *  ============================================================================
     */
    #define  POOLWRITEID        5
    #define  POOLWRITEADDR      (POOLMEMORYADDR + POOLMEMORYSIZE)
    #define  POOLWRITESIZE      0x200000u

    /** ============================================================================
     *  @name   POOLREADADDR/POOLREADSIZE
     *
     *  @desc   Indicates startaddress/size for dsplink POOL memory region.
     *  ============================================================================
     */
    #define  POOLREADID         6
    #define  POOLREADADDR       (POOLWRITEADDR + POOLWRITESIZE)
    #define  POOLREADSIZE       0x200000u


    /** ============================================================================
     *  @name   LINKCFG_memTable_00
     *
     *  @desc   Memory table ID 0.
     *  ============================================================================
     */
    STATIC LINKCFG_MemEntry  LINKCFG_memTable_00 [] =
    {
        {
            RSTENTRYID,                        /* ENTRY          : Entry number */
            "RESETCTRL",                       /* NAME           : Name of the memory region */
            RESETCTRLADDR,                     /* ADDRPHYS       : Physical address */
            RESETCTRLADDR,                     /* ADDRDSPVIRT    : DSP virtual address */
            (Uint32) -1,                       /* ADDRGPPVIRT    : GPP virtual address (if known) */
            RESETCTRLSIZE,                     /* SIZE           : Size of the memory region */
            FALSE,                             /* SHARED         : Shared access memory? */
            FALSE,                             /* SYNCD          : Synchornized? */
        },
        {
            CODEENTRYID,                       /* ENTRY          : Entry number */
            "SDRAM",                            /* NAME           : Name of the memory region */
            CODEMEMORYADDR,                    /* ADDRPHYS       : Physical address */
            CODEMEMORYADDR,                    /* ADDRDSPVIRT    : DSP virtual address */
            (Uint32) -1,                       /* ADDRGPPVIRT    : GPP virtual address (if known) */
            CODEMEMORYSIZE,                    /* SIZE           : Size of the memory region */
            FALSE,                             /* SHARED         : Shared access memory? */
            FALSE,                             /* SYNCD          : Synchornized? */
        },
        {
            SHAREDENTRYID0,                   /* ENTRY          : Entry number */
            "DSPLINKMEM",                     /* NAME           : Name of the memory region */
            SHAREDMEMORYADDR0,                /* ADDRPHYS       : Physical address */
            SHAREDMEMORYADDR0,                /* ADDRDSPVIRT    : DSP virtual address */
           (Uint32) -1,                      /* ADDRGPPVIRT    : GPP virtual address (if known) */
            SHAREDMEMORYSIZE0,                /* SIZE           : Size of the memory region */
            TRUE,                             /* SHARED         : Shared access memory? */
            FALSE,                            /* SYNCD          : Synchornized? */
        },
        {
            SHAREDENTRYID1,                   /* ENTRY          : Entry number */
            "DSPLINKMEM1",                     /* NAME           : Name of the memory region */
            SHAREDMEMORYADDR1,                /* ADDRPHYS       : Physical address */
            SHAREDMEMORYADDR1,                /* ADDRDSPVIRT    : DSP virtual address */
            (Uint32) -1,                      /* ADDRGPPVIRT    : GPP virtual address (if known) */
            SHAREDMEMORYSIZE1,                /* SIZE           : Size of the memory region */
            TRUE,                             /* SHARED         : Shared access memory? */
            FALSE,                            /* SYNCD          : Synchornized? */
        },
        {
            POOLENTRYID,                       /* ENTRY          : Entry number */
            "POOLMEM",                         /* NAME           : Name of the memory region */
            POOLMEMORYADDR,                    /* ADDRPHYS       : Physical address */
            POOLMEMORYADDR,                    /* ADDRDSPVIRT    : DSP virtual address */
            (Uint32) -1,                       /* ADDRGPPVIRT    : GPP virtual address (if known) */
            POOLMEMORYSIZE,                    /* SIZE           : Size of the memory region */
            TRUE,                              /* SHARED         : Shared access memory? Logically */
            FALSE,                             /* SYNCD          : Synchornized? */
        },
        {
            POOLWRITEID,                       /* ENTRY          : Entry number */
            "WRITEMEM",                     /* NAME           : Name of the memory region */
            POOLWRITEADDR,                     /* ADDRPHYS       : Physical address */
            POOLWRITEADDR,                     /* ADDRDSPVIRT    : DSP virtual address */
            (Uint32) -1,                    /* ADDRGPPVIRT    : GPP virtual address (if known) */
            POOLWRITESIZE,                     /* SIZE           : Size of the memory region */
            FALSE,                          /* SHARED         : Shared access memory? */
            FALSE,                          /* SYNCD          : Synchornized? */
     
        },
        {
            POOLREADID,                        /* ENTRY          : Entry number */
            "READMEM",                         /* NAME           : Name of the memory region */
            POOLREADADDR,                      /* ADDRPHYS       : Physical address */
            POOLREADADDR,                      /* ADDRDSPVIRT    : DSP virtual address */
            (Uint32) -1,                       /* ADDRGPPVIRT    : GPP virtual address (if known) */
            POOLREADSIZE,                      /* SIZE           : Size of the memory region */
            FALSE,                              /* SHARED         : Shared access memory? */
            FALSE,                             /* SYNCD          : Synchornized? */
        },
        {
            7,                     /* ENTRY          : Entry number */
            "DSPIRAM",             /* NAME           : Name of the memory region */
            0x11808000,            /* ADDRPHYS       : Physical address */
            0x11808000,            /* ADDRDSPVIRT    : DSP virtual address */
            (Uint32) -1,           /* ADDRGPPVIRT    : GPP virtual address (if known) */
            0x30000,               /* SIZE           : Size of the memory region */
            FALSE,                 /* SHARED         : Shared access memory? */
            FALSE,                 /* SYNCD          : Synchornized? */
        },
        {
            8,                     /* ENTRY          : Entry number */
            "DSPL1DRAM",           /* NAME           : Name of the memory region */
            0x11F00000,            /* ADDRPHYS       : Physical address */
            0x11F00000,            /* ADDRDSPVIRT    : DSP virtual address */
            (Uint32) -1,           /* ADDRGPPVIRT    : GPP virtual address (if known) */
            0x8000,                /* SIZE           : Size of the memory region */
            FALSE,                 /* SHARED         : Shared access memory? */
            FALSE,                 /* SYNCD          : Synchornized? */
        },
    } ;

    /** ============================================================================
     *  @name   LINKCFG_memTables
     *
     *  @desc   Array of memory tables in the system.
     *  ============================================================================
     */
    STATIC LINKCFG_MemEntry * LINKCFG_memTables [] =
    {
        LINKCFG_memTable_00        /* Memory Table 0 */
    } ;

    /** ============================================================================
     *  @name   LINKCFG_ipsTable_00
     *
     *  @desc   IPS table ID 0.
     *  ============================================================================
     */
    STATIC LINKCFG_Ips  LINKCFG_ipsTable_00 [] =
    {
        {
            "IPS",                   /* NAME           : Name of the Inter-Processor-Signaling component */
            (Uint32) 32,             /* NUMIPSEVENTS   : Number of IPS events to be supported */
            (Uint32) SHAREDENTRYID0, /* MEMENTRY       : Memory entry ID (-1 if not needed) */
            (Uint32) 28,             /* GPPINTID       : Interrupt no. to used by the IPS on GPP-side. (-1 if uni-directional to DSP) */
            (Uint32) 5,              /* DSPINTID       : Interrupt no. to used by the IPS on DSP-side. (-1 if uni-directional to GPP) */
            (Uint32) 4,              /* DSPINTVECTORID : Interrupt vector no. to used by the IPS on DSP-side. (-1 if uni-directional to GPP) */
            (Uint32) 50000000,       /* ARGUMENT1      : Poll value for which IPS waits while sending event (-1 if infinite) */
            0                        /* ARGUMENT2      : Second IPS-specific argument */
        },
        {
            "IPS",                   /* NAME           : Name of the Inter-Processor-Signaling component */
            (Uint32) 32,             /* MAXIPSEVENTS   : Number of IPS events to be supported */
            (Uint32) SHAREDENTRYID1, /* MEMENTRY       : Memory entry ID (-1 if not needed) */
            (Uint32) 29,             /* GPPINTID       : Interrupt no. to used by the IPS on GPP-side. (-1 if uni-directional to DSP) */
            (Uint32) 67,             /* DSPINTID       : Interrupt no. to used by the IPS on DSP-side. (-1 if uni-directional to GPP) */
            (Uint32) 5,              /* DSPINTVECTORID : Interrupt vector no. to used by the IPS on DSP-side. (-1 if uni-directional to GPP) */
            (Uint32) 50000000,       /* ARGUMENT1      : Poll value for which IPS waits while sending event (-1 if infinite) */
            0                        /* ARGUMENT2      : Second IPS-specific argument */
        }
    } ;

    /** ============================================================================
     *  @name   LINKCFG_ipsTables
     *
     *  @desc   Array of IPS tables in the system.
     *  ============================================================================
     */
    STATIC LINKCFG_Ips * LINKCFG_ipsTables [] =
    {
        LINKCFG_ipsTable_00        /* IPS Table 0 */
    } ;

    /** ============================================================================
     *  @name   LINKCFG_poolTable_00
     *
     *  @desc   Pool table ID 0.
     *  ============================================================================
     */
    STATIC LINKCFG_Pool  LINKCFG_poolTable_00 [] =
    {
        {
            "SMAPOOL",                /* NAME           : Name of the pool */
            (Uint32) SHAREDENTRYID1,  /* MEMENTRY       : Memory entry ID (-1 if not needed) */
            (Uint32) POOLMEMORYSIZE,  /* POOLSIZE       : Size of the pool (-1 if not needed) */
            (Uint32) -1,              /* IPSID          : ID of the IPS used */
            (Uint32) -1,              /* IPSEVENTNO     : IPS Event number associated with POOL */
            POOLENTRYID,              /* POOLMEMENTRY   : Pool memory region section ID  */
            0x0,                      /* ARGUMENT1      : First Pool-specific argument */
            0x0                       /* ARGUMENT2      : Second Pool-specific argument */
        }
    } ;

    /** ============================================================================
     *  @name   LINKCFG_poolTables
     *
     *  @desc   Array of Pool tables in the system.
     *  ============================================================================
     */
    STATIC LINKCFG_Pool * LINKCFG_poolTables [] =
    {
        LINKCFG_poolTable_00       /* Pool Table 0 */
    } ;

    /** ============================================================================
     *  @name   LINKCFG_dataTable_00
     *
     *  @desc   Data driver table ID 0.
     *  ============================================================================
     */
    STATIC LINKCFG_DataDrv  LINKCFG_dataTable_00 [] =
    {
        {
            "ZCPYDATA",              /* NAME           : Name of the data driver */
            0,                       /* BASECHANNELID  : Base channel ID for the driver */
            16,                      /* NUMCHANNELS    : Number of channels supported */
            16384,                   /* MAXBUFSIZE     : Maximum size of buffer supported (-1 if no limit) */
            (Uint32) SHAREDENTRYID1, /* MEMENTRY       : Memory entry ID (-1 if not needed) */
            0,                       /* POOLID         : Pool id for allocating buffers */
            1,                       /* QUEUELENGTH    : Queue length for the data driver */
            1,                       /* IPSID          : ID of the IPS used */
            1,                       /* IPSEVENTNO     : IPS Event number associated with data Driver */
            0x0,                     /* ARGUMENT1      : First data driver specific argument */
            0x0                      /* ARGUMENT2      : Second data driver specific argument */
        }
    } ;

    /** ============================================================================
     *  @name   LINKCFG_dataTables
     *
     *  @desc   Array of Data driver tables in the system.
     *  ============================================================================
     */
    STATIC LINKCFG_DataDrv * LINKCFG_dataTables [] =
    {
        LINKCFG_dataTable_00       /* Data Table 0 */
    } ;

    /** ============================================================================
     *  @name   LINKCFG_mqtObjects
     *
     *  @desc   Array of Message Queue Transport objects in the system.
     *  ============================================================================
     */
    STATIC LINKCFG_Mqt  LINKCFG_mqtObjects [] =
    {
        {
            "ZCPYMQT",                /* NAME           : Name of the Message Queue Transport */
            (Uint32) SHAREDENTRYID1,  /* MEMENTRY       : Memory entry ID (-1 if not needed) */
            (Uint32) -1,              /* MAXMSGSIZE     : Maximum message size supported (-1 if no limit) */
            1,                        /* IPSID          : ID of the IPS used */
            0,                        /* IPSEVENTNO     : IPS Event number associated with MQT */
            0x0,                      /* ARGUMENT1      : First MQT-specific argument */
            0x0                       /* ARGUMENT2      : Second MQT-specific argument */
        }
    } ;

    /** ============================================================================
     *  @name   LINKCFG_ringIoObjects
     *
     *  @desc   Array of RINGIO objects in the system.
     *  ============================================================================
     */
    STATIC LINKCFG_RingIo  LINKCFG_ringIoObjects [] =
    {
        {
            "RINGIOTABLE",  /* NAME           : Name of the RingIO Table */
            SHAREDENTRYID0, /* MEMENTRY       : Memory entry ID (-1 if not needed) */
            64,             /* NUMENTRIES     : Number of RingIO entries supported */
            0,              /* IPSID          : ID of the IPS used */
            0               /* IPSEVENTNO     : IPS Event number associated with RingIO */
        }
    } ;

    /** ============================================================================
     *  @name   LINKCFG_mplistObjects
     *
     *  @desc   Array of MPLIST objects in the system.
     *  ============================================================================
     */
    STATIC LINKCFG_MpList  LINKCFG_mplistObjects [] =
    {
        {
            "MPLISTTABLE",         /* NAME           : Name of the MpList Table */
            SHAREDENTRYID1,        /* MEMENTRY       : Memory entry ID (-1 if not needed) */
            64,                    /* NUMENTRIES     : Number of MpList entries supported */
            (Uint32) -1,           /* IPSID          : ID of the IPS used */
            (Uint32) -1            /* IPSEVENTNO     : IPS Event number associated with MpList */
        }
    } ;

    /** ============================================================================
     *  @name   LINKCFG_mpcsObjects
     *
     *  @desc   Array of MPCS objects in the system.
     *  ============================================================================
     */
    STATIC LINKCFG_Mpcs  LINKCFG_mpcsObjects [] =
    {
        {
            "MPCS",                /* NAME           : Name of the MPCS Table */
            SHAREDENTRYID1,        /* MEMENTRY       : Memory entry ID (-1 if not needed) */
            256,                   /* NUMENTRIES     : Number of MPCS entries supported */
            (Uint32) -1,           /* IPSID          : ID of the IPS used */
            (Uint32) -1            /* IPSEVENTNO     : IPS Event number associated with MPCS */
        }
    } ;

    /** ============================================================================
     *  @name   LINKCFG_gppObject
     *
     *  @desc   Configuration object for the GPP.
     *  ============================================================================
     */
    STATIC LINKCFG_Log  LINKCFG_logObject = {
        FALSE,             /* GDMSGQPUT         : GPP->DSP MSG Transfer  - MSGQ_put call */
        FALSE,             /* GDMSGQSENDINT     : GPP->DSP MSG Transfer  - GPP sends interrupt */
        FALSE,             /* GDMSGQISR         : GPP->DSP MSG Transfer  - DSP receives interrupt */
        FALSE,             /* GDMSGQQUE         : GPP->DSP MSG Transfer  - Message queued at DSP */
        FALSE,             /* DGMSGQPUT         : DSP->GPP MSG Transfer  - MSGQ_put call */
        FALSE,             /* DGMSGQSENDINT     : DSP->GPP MSG Transfer  - DSP sends interrupt */
        FALSE,             /* DGMSGQISR         : DSP->GPP MSG Transfer  - GPP receives interrupt */
        FALSE,             /* DGMSGQQUE         : DSP->GPP MSG Transfer  - Message queued at GPP */
        FALSE,             /* GDCHNLISSUESTART  : GPP->DSP CHNL Transfer - Entering inside ISSUE call */
        FALSE,             /* GDCHNLISSUEQUE    : GPP->DSP CHNL Transfer - ISSUE: Buffer is queued in internal structure on GPP */
        FALSE,             /* GDCHNLISSUECOMPL  : GPP->DSP CHNL Transfer - ISSUE call completed */
        FALSE,             /* GDCHNLXFERSTART   : GPP->DSP CHNL Transfer - Initiating a buffer transfer by GPP */
        FALSE,             /* GDCHNLXFERPROCESS : GPP->DSP CHNL Transfer - Actual transfer of buffer is going to take place */
        FALSE,             /* GDCHNLXFERCOMPL   : GPP->DSP CHNL Transfer - Buffer transfer is complete */
        FALSE,             /* GDCHNLRECLSTART   : GPP->DSP CHNL Transfer - Entering RECLAIM call */
        FALSE,             /* GDCHNLRECLPEND    : GPP->DSP CHNL Transfer - RECLAIM: Wait on a semaphore */
        FALSE,             /* GDCHNLRECLPOST    : GPP->DSP CHNL Transfer - RECLAIM: Posting the Semaphore */
        FALSE,             /* GDCHNLRECLCOMPL   : GPP->DSP CHNL Transfer - RECLAIM call completed */
        FALSE,             /* DGCHNLISSUEQUE    : DSP->GPP CHNL Transfer - ISSUE: Buffer is queued in internal structure on DSP */
        FALSE,             /* DGCHNLXFERSTART   : DSP->GPP CHNL Transfer - Initiating a buffer transfer by DSP */
        FALSE,             /* DGCHNLXFERPROCESS : DSP->GPP CHNL Transfer - Actual transfer of buffer is going to take place */
        FALSE,             /* DGCHNLXFERCOMPL   : DSP->GPP CHNL Transfer - Buffer transfer is complete */
        FALSE,             /* DGCHNLRECLPEND    : DSP->GPP CHNL Transfer - RECLAIM: Wait on a semaphore */
        FALSE,             /* DGCHNLRECLPOST    : DSP->GPP CHNL Transfer - RECLAIM: Posting the Semaphore */
        10,                /* MSGIDRANGESTART   : MSG ID range: lower limit */
        20                 /* MSGIDRANGEEND     : MSG ID range: upper limit */
    } ;

    /** ============================================================================
     *  @name   LINKCFG_linkDrvObjects
     *
     *  @desc   Array of Link driver objects in the system.
     *  ============================================================================
     */
    STATIC LINKCFG_LinkDrv  LINKCFG_linkDrvObjects [] =
    {
        {
            "SHMDRV",                                                 /* NAME           : Name of the link driver */
            DRVHANDSHAKEPOLLCOUNT,                                       /* HSHKPOLLCOUNT  : Poll value for which handshake waits (-1 if infinite) */
            (Uint32) SHAREDENTRYID1,                                  /* MEMENTRY       : Memory entry ID (-1 if not needed) */
            0,                                                        /* IPSTABLEID     : ID of the IPS table used */
            sizeof (LINKCFG_ipsTable_00) / sizeof (LINKCFG_Ips),      /* IPSENTRIES     : Number of IPS supported */
            0,                                                        /* POOLTABLEID    : ID of the POOL table */
            sizeof (LINKCFG_poolTable_00) / sizeof (LINKCFG_Pool),    /* NUMPOOLS       : Number of POOLs supported */
            0,                                                        /* DATATABLEID    : ID of the data driver table */
            sizeof (LINKCFG_dataTable_00) / sizeof (LINKCFG_DataDrv), /* NUMDATADRV     : Number of data drivers supported */
            0,                                                        /* MQTID          : ID of the MQT */
            0,                                                        /* RINGIOTABLEID  : RingIO Table Id used for this DSP */
            0,                                                        /* MPLISTTABLEID  : MpList Table Id used for this DSP */
            0                                                         /* MPCSTABLEID    : MPCS Table ID used for this DSP */
        },
    } ;

    /** ============================================================================
     *  @name   LINKCFG_dspObjects
     *
     *  @desc   Array of configuration objects for the DSPs in the system.
     *  ============================================================================
     */
    STATIC LINKCFG_Dsp  LINKCFG_dspObject =
    {
        "DA8XXGEM",                                              /* NAME           : Name of the DSP */
        DspArch_C64x,                                            /* ARCHITECTURE   : DSP architecture */
        "COFF",                                                  /* LOADERNAME     : Name of the DSP executable loader */
        FALSE,                                                   /* AUTOSTART      : Autostart the DSP (Not supported) */
        "DEFAULT.OUT",                                           /* EXECUTABLE     : Executable for autostart */
        DSP_BootMode_Boot_Pwr,                                     /* DOPOWERCTRL    : Link does the Power Ctrl of DSP. */
        RESETCTRLADDR,                                           /* RESUMEADDR     : Resume address */
        RESETCTRLADDR,                                           /* RESETVECTOR    : Reset Vector for the DSP */
        RESETCTRLSIZE,                                           /* RESETCODESIZE  : Size of code at DSP Reset Vector */
        1,                                                       /* MADUSIZE       : DSP Minimum Addressable Data Unit */
        (Uint32) -1,                                             /* CPUFREQ        : DSP Frequency (in KHz), -1 if default setting is to be used */
        Endianism_Little,                                        /* ENDIAN         : DSP Endianism */
        FALSE,                                                   /* WORDSWAP       : Words must be swapped when writing to memory */
        0,                                                       /* MEMTABLEID     : ID of the memory table used */
        sizeof (LINKCFG_memTable_00)/sizeof (LINKCFG_MemEntry),  /* MEMENTRIES     : Number of entries in memory table */
        0,                                                       /* LINKDRVID      : ID of the link driver used */
        0,                                                       /* ARG1           : Bus No of PCI card */
        0,                                                       /* ARG2           : Slot No of PCI card */
        0,                                                       /* ARG3           : DSPLINK Shared memory region for control data structures creation */
        0,                                                       /* ARG4           : Unused */
        0                                                        /* ARG5           : Unused */
    } ;

    /** ============================================================================
     *  @name   DA8XXGEM_SHMEM_Config
     *
     *  @desc   DSP/BIOS LINK configuration structure.
     *  ============================================================================
     */
    LINKCFG_DspConfig  DA8XXGEM_SHMEM_Config = {
        (LINKCFG_Dsp *)       &LINKCFG_dspObject,                   /* DSPOBJECTS     : Array of DSP objects */
        sizeof (LINKCFG_linkDrvObjects)/sizeof (LINKCFG_LinkDrv),   /* NUMLINKDRVS    : Number of Link Drviers*/
        (LINKCFG_LinkDrv *)   LINKCFG_linkDrvObjects,               /* LINKDRVOBJECTS : Array of Link Driver objects */
        sizeof (LINKCFG_memTables)/sizeof (LINKCFG_MemEntry *),     /* NUMMEMTABLES   : Number of memory tables */
        (LINKCFG_MemEntry **) LINKCFG_memTables,                    /* MEMTABLES      : Array of Memory tables */
        sizeof (LINKCFG_ipsTables)/sizeof (LINKCFG_Ips *),          /* NUMIPSTABLES   : Number of IPS tables */
        (LINKCFG_Ips **)      LINKCFG_ipsTables,                    /* IPSTABLES      : Array of IPS tables */
        sizeof (LINKCFG_poolTables)/sizeof (LINKCFG_Pool *),        /* NUMPOOLTABLES  : Number of POOL tables */
        (LINKCFG_Pool **)     LINKCFG_poolTables,                   /* POOLTABLES     : Array of Pool tables */
        sizeof (LINKCFG_dataTables)/sizeof (LINKCFG_DataDrv *),     /* NUMDATATABLES  : Number of data tables */
        (LINKCFG_DataDrv **)  LINKCFG_dataTables,                   /* DATATABLES     : Array of data tables */
        sizeof (LINKCFG_mqtObjects)/sizeof (LINKCFG_Mqt),           /* NUMMQTS        : Number of MQTs */
        (LINKCFG_Mqt *)       LINKCFG_mqtObjects,                   /* MQTOBJECTS     : Array of MQT objects */
        sizeof (LINKCFG_ringIoObjects)/sizeof (LINKCFG_RingIo),     /* NUMRINGIOTABLES: Number of RINGIO tables */
        (LINKCFG_RingIo *)    LINKCFG_ringIoObjects,                /* RINGIOOBJECTS  : Array of RINGIO objects */
        sizeof (LINKCFG_mplistObjects)/sizeof (LINKCFG_MpList),     /* NUMMPLISTTABLES: Number of MPLIST tables */
        (LINKCFG_MpList *)    LINKCFG_mplistObjects,                /* MPLISTOBJECTS  : Array of MPLIST objects */
        sizeof (LINKCFG_mpcsObjects)/sizeof (LINKCFG_Mpcs),         /* NUMMPCSTABLES  : Number of MPCS tables */
        (LINKCFG_Mpcs *)      LINKCFG_mpcsObjects,                  /* MPCSOBJECTS    : Array of MPCS objects */
        (LINKCFG_Log *)       &LINKCFG_logObject,                   /* LOGOBJECT      : Pointer to LOG object */
    } ;


    #if defined (__cplusplus)
    }
    #endif /* defined (__cplusplus) */

    The DSP side is:

    /** ============================================================================
     *  @file   dsplink-omapl1xxgem-base.tci
     *
     *  @path   $(DSPLINK)/dsp/inc/DspBios/5.XX/OMAPL1XXGEM/
     *
     *  @desc   This file defines base configuration for DSP/BIOS LINK.
     *
     *  @ver    1.61.01
     *  ============================================================================
     *  Copyright (c) Texas Instruments Incorporated 2002-2008
     *
     *  Use of this software is controlled by the terms and conditions found in the
     *  license agreement under which this software has been supplied or provided.
     *  ============================================================================
     */


    /*  ============================================================================
     *  Load assert support
     *  ============================================================================
     */
    utils.importFile("assert.tci");

    /*  ============================================================================
     *  Load base TCI file.
     *  ============================================================================
     */
    utils.loadPlatform("ti.platforms.evmOMAPL137") ;

    /*  ============================================================================
     *  Enable common BIOS features used by all examples
     *  ============================================================================
     */
    bios.disableRealTimeAnalysis(prog);
    bios.enableMemoryHeaps(prog);
    bios.disableRtdx(prog);
    bios.enableTskManager(prog);

    /*  ============================================================================
     *  GBL
     *  ============================================================================
     */
    prog.module("GBL").ENABLEALLTRC    = false ;
    prog.module("GBL").PROCID          = parseInt (arguments [0]) ;

    prog.module("GBL").C64PLUSCONFIGURE   = true   ;
    prog.module("GBL").C64PLUSL2CFG       = "32k" ;
    prog.module("GBL").C64PLUSL1DCFG      = "32k"  ;
    prog.module("GBL").C64PLUSMAR192to223 = 0x00000008 ;


    /*  ============================================================================
     *  MEM
     *  ============================================================================
     */
    prog.module("MEM").STACKSIZE = 0x1000 ;

    /*  ============================================================================
     *  MEM : RESET_VECTOR
     *  ============================================================================
     */
    var RESET_VECTOR = prog.module("MEM").create("RESET_VECTOR");
    RESET_VECTOR.base        = 0xC2000000 ;
    RESET_VECTOR.len         = 0x00000080;
    RESET_VECTOR.space       = "code/data";
    RESET_VECTOR.createHeap  = false;
    RESET_VECTOR.comment     = "RESET_VECTOR";

    /*  ============================================================================
     *  MEM : SDRAM
     *  ============================================================================
     */
    var SDRAM = prog.module("MEM").instance("SDRAM");
    SDRAM.base             = RESET_VECTOR.base + RESET_VECTOR.len ;
    SDRAM.len              = 0x7FFF80;
    SDRAM.space            = "code/data";
    SDRAM.createHeap       = true;
    SDRAM.heapSize         = 0x10000;
    SDRAM.comment          = "SDRAM";

    /*  ============================================================================
     *  MEM : DSPLINKMEM
     *  ============================================================================
     */
    var DSPLINKMEM = prog.module("MEM").create("DSPLINKMEM");
    DSPLINKMEM.base             = SDRAM.base + SDRAM.len;
    DSPLINKMEM.len              = 0x200000;
    DSPLINKMEM.createHeap       = false;
    DSPLINKMEM.comment          = "DSPLINKMEM";

    /*  ============================================================================
     *  MEM : POOLMEM
     *  ============================================================================
     */
    var POOLMEM = prog.module("MEM").create("POOLMEM");
    POOLMEM.base        = DSPLINKMEM.base + DSPLINKMEM.len ;
    POOLMEM.len         = 0x200000 ;
    POOLMEM.createHeap  = false;
    POOLMEM.comment     = "POOLMEM";

    /* MEM : WRITEMEM */
    var WRITEMEM = prog.module("MEM").create("WRITEMEM");
    WRITEMEM.base             = POOLMEM.base + POOLMEM.len;
    WRITEMEM.len              = 0x200000;
    WRITEMEM.createHeap       = false;
    WRITEMEM.comment          = "WRITEMEM";
     
    /* MEM : READMEM */
    var READMEM = prog.module("MEM").create("READMEM");
    READMEM.base             = WRITEMEM.base + WRITEMEM.len;
    READMEM.len              = 0x200000;
    READMEM.createHeap       = false;
    READMEM.comment          = "READMEM";

     

     

     

     

     

  • Dear Deepali:

    It seems we need to modify another place for the read/write pool, which wiki didn't mention about while programming guide do.Please see following, what about the attribute for "MEMENTRY" and "POOLMEMENTRY" item? Do I configure alright? The programming guide seems to lack the meaning for  "POOLMEMENTRY"  configuration. I don't know the purpose for these two items.

     

    STATIC LINKCFG_Pool  LINKCFG_poolTable_00 [] =
    {
        {
            "SMAPOOL",                /* NAME           : Name of the pool */
            (Uint32) SHAREDENTRYID1,  /* MEMENTRY       : Memory entry ID (-1 if not needed) */
            (Uint32) POOLMEMORYSIZE,  /* POOLSIZE       : Size of the pool (-1 if not needed) */
            (Uint32) -1,              /* IPSID          : ID of the IPS used */
            (Uint32) -1,              /* IPSEVENTNO     : IPS Event number associated with POOL */
            POOLENTRYID,              /* POOLMEMENTRY   : Pool memory region section ID  */
            0x0,                      /* ARGUMENT1      : First Pool-specific argument */
            0x0                       /* ARGUMENT2      : Second Pool-specific argument */
        },
        {
            "SMAPOOL",                /* NAME           : Name of the pool */
            (Uint32) SHAREDENTRYID1,  /* MEMENTRY       : Memory entry ID (-1 if not needed) */
            (Uint32) POOLWRITESIZE,   /* POOLSIZE       : Size of the pool (-1 if not needed) */
            (Uint32) -1,              /* IPSID          : ID of the IPS used */
            (Uint32) -1,              /* IPSEVENTNO     : IPS Event number associated with POOL */
            POOLWRITEID,              /* POOLMEMENTRY   : Pool memory region section ID  */
            0x0,                      /* ARGUMENT1      : First Pool-specific argument */
            0x0                       /* ARGUMENT2      : Second Pool-specific argument */
        },
        {
            "SMAPOOL",                /* NAME           : Name of the pool */
            (Uint32) SHAREDENTRYID1,  /* MEMENTRY       : Memory entry ID (-1 if not needed) */
            (Uint32) POOLREADSIZE,    /* POOLSIZE       : Size of the pool (-1 if not needed) */
            (Uint32) -1,              /* IPSID          : ID of the IPS used */
            (Uint32) -1,              /* IPSEVENTNO     : IPS Event number associated with POOL */
            POOLREADID,               /* POOLMEMENTRY   : Pool memory region section ID  */
            0x0,                      /* ARGUMENT1      : First Pool-specific argument */
            0x0                       /* ARGUMENT2      : Second Pool-specific argument */
        },

    } ;

  • Dear Calvin

     

    I read this blog to find the difference between SHAREDENTRYID1 and POOLENTRYID in

     

    STATIC LINKCFG_Pool  LINKCFG_poolTable_00 [] =
    {
        {
            "SMAPOOL",             /* NAME           : Name of the pool */
            SHAREDENTRYID1,        /* MEMENTRY       : Memory entry ID (-1 if not needed) */
            (Uint32) POOLMEMORYSIZE,      /* POOLSIZE       : Size of the pool (-1 if not needed) */
            (Uint32) -1,           /* IPSID          : ID of the IPS used */
            (Uint32) -1,           /* IPSEVENTNO     : IPS Event number associated with POOL */
            POOLENTRYID,           /* POOLMEMENTRY   : Pool memory region section ID  */
            0x0,                   /* ARGUMENT1      : First Pool-specific argument */
            0x0                    /* ARGUMENT2      : Second Pool-specific argument */
        }
    } ;

     

    but I couldn't. So what is the difference between MEMENTRY and POOLMEMENTRY

     

    I got this from the file

    dsplink_linux_1_65_00_03/dsplink/config/all/CFG_OMAP3530_SHMEM.c

    I used this on beagleboard and the example in the programmer guide doesn't mention POOLMEMENTRY in the first place.

    Thanks

    Hazem

  • Hi,

     

     I found the POOLENTRYID in the Migration Guide

    that is shipped with dsplink sources on page 19 it says

     

    A new field POOLENTRYID has been added in POOL entry inside the static configuartion
    file to indicate the memory entry ID for the pool buffers. Control structures of pool are
    allocated from the DSPLink shared memory region, while the memory for buffers are
    allocated from the memory region pointed by POOLENTRYID.

     

    Hazem

  • Just started to try something similar myself so I might be wrong but I believe that these segments should in the DSP Memory. If 100MB are used by the GPP and 28MB are used by the DSP I assume that your memory is split this way :

    GPP : 0xC0000000-0xC63FFFFF
    DSP : 0xC6400000-0xC7FFFFFF

    or less likely this way :

    DSP : 0xC0000000-0xC1BFFFFF
    GPP: 0xC1C00000-0xC7FFFFFF

    regardless of the case the segment 0xC2000000-0xC2FFFFFF would be in the GPP memory.

    Also, not sure if it's relavent but only the 0xC3000000-0xC3FFFFFF memory range is cacheable on the DSP side:

    prog.module("GBL").C64PLUSMAR192to223 = 0x00000008 ;

    If you really want to use the 0xC2000000-0xC2FFFFFF segment it should rather be :

    prog.module("GBL").C64PLUSMAR192to223 = 0x00000004 ;

    Not sure if it's a performance only issue but according to Changing DSPLink Memory Map it should be done. See TMS320C674x DSP Megamodule for the detailed description of the Memory Attribute Registers (MAR).