AM3352:

Hi,

I am communicating with AM3352 on a Linux system based on Proccessor SDK 05.03 using a modified tty driver.
I am now implementing the communication protocol that communicates with one host and multiple nodes, sends tokens from the host with even parity to determine which node is allowed to send and receive, and sends and receives between the node and host with odd parity.

In the standard Linux tty driver, the parity change is done in omap_8250_set_termios() <drivers/tty/serial/8250/8250_omap.c>.
If changing the parity setting, we only need to change the LCR register, but this function sets other many communication setting related registers. Unfortunately, the standard driver is not in time for the reception sent by the host after the parity change. Therefore, i modified to operate only the LCR register when additional parameters are given.

Then, the following phenomenon occurred with this modified device driver.

If transmission is performed after changing the parity by operating the LCR register, the following illegal operations may occur.
-One byte extra byte data is transmitted before the transmission data.
-Transmission DMA may not work.

There is a related errata related to the MDR1 register, but what is happening to me is due to the LCR register.
Another person's question: "IWR6843: Change UART parity odd to even in flight"(e2e.ti.com/.../949346 may be similar to my phenomenon.

As a countermeasure, clear the TX-FIFO between the parity switching and the start of transmission.
Due to the behavior not described in the errata information and RTM, it took time to take measures.
This was done in a standard driver, a process I omitted.
Therefore, it does not occur with the standard driver.

I would appreciate it if you could add errata information, or get an opinion like "Do not change settings during sending and receiving", or tell me that "It is this description on TRM".