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AM5749: TI-RTOS PCIe driver through remote bridge to EP

Part Number: AM5749
Other Parts Discussed in Thread: XIO2001

I have Linux running on the A15 of the AM5749 and TI-RTOS running the PDK PCIe example on the M4 IPU.

The PCIe bus has a Hilscher CIFX 90 "Profinet Master" card, which (unfortunately for the PDK PCIe driver) contains a PCIe to PCI bridge. See attached picture.

The PCIe example will talk to the XIO2001 bridge as the remote device, but provides no way to talk to the CIFX module behind the XIO2001 bridge.

If I boot to Linux, the pcie bus is enumerated as follows:
root@am57xx-evm:~# lspci -v
00:00.0 PCI bridge: Texas Instruments Multicore DSP+ARM KeyStone II SOC (rev 01) (prog-if 00 [Normal decode])
Flags: bus master, fast devsel, latency 0, IRQ 169
Memory at 20100000 (64-bit, non-prefetchable) [size=1M]
Bus: primary=00, secondary=01, subordinate=ff, sec-latency=0
I/O behind bridge: None
Memory behind bridge: 20200000-202fffff [size=1M]
Prefetchable memory behind bridge: None
Capabilities: [40] Power Management version 3
Capabilities: [50] MSI: Enable+ Count=1/1 Maskable- 64bit+
Capabilities: [70] Express Root Port (Slot-), MSI 00
Capabilities: [100] Advanced Error Reporting
Kernel driver in use: pcieport

01:00.0 PCI bridge: Texas Instruments XIO2001 PCI Express-to-PCI Bridge (prog-if 00 [Normal decode])
Flags: fast devsel
Bus: primary=01, secondary=02, subordinate=02, sec-latency=0
I/O behind bridge: None
Memory behind bridge: 20200000-202fffff [size=1M]
Prefetchable memory behind bridge: None
Capabilities: [40] Subsystem: Device 0000:0000
Capabilities: [48] Power Management version 3
Capabilities: [50] MSI: Enable- Count=1/16 Maskable- 64bit+
Capabilities: [70] Express PCI-Express to PCI/PCI-X Bridge, MSI 00
Capabilities: [100] Advanced Error Reporting

02:00.0 Unassigned class [ff00]: Hilscher GmbH CIFX 50E-DP(M/S)
Flags: medium devsel
Memory at 20200000 (32-bit, non-prefetchable) [disabled] [size=64K]

There was a similar, and perhaps more difficult case here: e2e.ti.com/.../611298

I see two main approaches (maybe there are more?):
1) Let Linux enumerate and configure the PCIe. Afterwards, disable the PCIE interrupt registration in Linux and have the M4 drive the PICe with the PDK PCIe driver.
- OR -
2) Strip the PCIe from the Linux device tree, and add enumeration features to the PDK PCIe driver.

Can you outline a preferred method to proceed?
Thank you for your help
Greg.

  • Hi Greg,

    The preferred option would be to add support for Hilscher card in Linux. Not sure if you have already support for it in RTOS. That way you can leverage the standard Linux enumeration feature, interrupt mechanisms etc.

    The other option would be to add support to access device behind bridge in PDK. For this a limited set of configuration should be added in PDK to access the device behind the PCIe bridge.

    Mix and match (part Linux and part RTOS) should preferably avoided.

    Thanks

    Kishon

  • >The other option would be to add support to access device behind bridge in PDK.

    How much effort would it require to add support to access devices behind the bridge in PDK?
    What would the steps be?

    Thank you for your help