TDA4VM: WKUP GPIO control during boot

Adam Kubiak

Part Number: TDA4VM

Hello TI,

We are currently using the ETHFW on our custom board and we need to release the phy connected to CPSW9G from reset by setting the WKUP_GPIO_6 pin(F29).
Right now we are configuring this pin in u-boot but this is too late in the boot process.(we are using PSDKLA 07.00)

How could we set this pin early during the boot process?(before u-boot starts)

Kind regards,

Adam

over 5 years ago

0 Keerthy J over 5 years ago

TI__Guru**** 170370 points

Hi Adam,

Any particular boot stage you want this to enabled or it can be as early as R5 SPL?

Best Regards,
Keerthy

0 Adam Kubiak over 5 years ago in reply to Keerthy J

Intellectual 920 points

Hi Keerthy,

R5-SPL should be fine.

Would it be possible to add this to the ETHFW or would this require too many changes in the ETHFW?

This solution will be temporary until we have a final SW running on the MCU R5 core which will handle this.

Kind regards,

Adam

0 Keerthy J over 5 years ago in reply to Adam Kubiak

TI__Guru**** 170370 points

Adam,

Since this is more of a temporary solution this is a pure hack to get WKUP_GPIO0_6 set to 1.

Can you try the below diff & check if you are unblocked?

diff --git a/arch/arm/mach-k3/j721e_init.c b/arch/arm/mach-k3/j721e_init.c
index 586f3e4fbc..2f8c05927c 100644
--- a/arch/arm/mach-k3/j721e_init.c
+++ b/arch/arm/mach-k3/j721e_init.c
@@ -192,6 +192,11 @@ void setup_navss_nb(void)
        /* Map orderid 8-15 to VBUSM.C thread 2 (real-time traffic) */
        writel(2, NAVSS0_NBSS_NB0_CFG_NB_THREADMAP);
        writel(2, NAVSS0_NBSS_NB1_CFG_NB_THREADMAP);
+
+
+       writel(0x08050007, 0x4301c0c8); /* Pin mux configuratin */
+       writel(0xFFFFFFBF, 0x42110010); /* WKUP_GPIO0_6 Direction to output */
+       writel(0x40, 0x42110014);  /* WKUP_GPIO0_6 Value set to 1 */
 }
 
 void setup_dss_credentials(void)

Please resolve the issue if it unblocks you.

Best Regards,
Keerthy

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TDA4VM: WKUP GPIO control during boot