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QDMA transfer

Hi,

I have tried to initiate QDMA transfer on EVM DM6437 but the transfed didn't happened.

What should I write in the this code to execute  DMA transfer. A_count = 1, B_Count = 8, C_Count  = 1, so whe have transfer of 8 Bytes. How to do this using QDMA?

Here is the code I wrote for the transfer:

' header file :'

#define EDMA_3CC_QCHMAP0    *( volatile Uint32* )( EDMA_3CC_BASE + 0x0200 )

#define EDMA_PARAMSET0_BASE                         0x01C04000
#define EDMA_PARAMSET0_OPT                          *( volatile Uint32* )(EDMA_PARAMSET0_BASE + 0x0000)
#define EDMA_PARAMSET0_SRC                         *( volatile Uint32* )(EDMA_PARAMSET0_BASE + 0x0004)
#define EDMA_PARAMSET0_A_B_CNT                *( volatile Uint32* )(EDMA_PARAMSET0_BASE + 0x0008)
#define EDMA_PARAMSET0_DST                          *( volatile Uint32* )(EDMA_PARAMSET0_BASE + 0x000C)
#define EDMA_PARAMSET0_SRC_DST_BIDX   *( volatile Uint32* )(EDMA_PARAMSET0_BASE + 0x0010)
#define EDMA_PARAMSET0_LINK_BCNTRLD   *( volatile Uint32* )(EDMA_PARAMSET0_BASE + 0x0014)
#define EDMA_PARAMSET0_SRC_DST_CIDX   *( volatile Uint32* )(EDMA_PARAMSET0_BASE + 0x0018)
#define EDMA_PARAMSET0_CCNT                      *( volatile Uint32* )(EDMA_PARAMSET0_BASE + 0x001C)

'and main function :'

unsigned int A[750*480], B[750*480];                    // A and B global buffers are placed in External DDR2 memory

void main(void){

    A[0] = 0xABCD;
    EDMA_3CC_QCHMAP0 = 0x0000001C;

    EDMA_PARAMSET0_OPT          = 0x00000008;
    EDMA_PARAMSET0_SRC          = (unsigned int)&A[0];
    EDMA_PARAMSET0_A_B_CNT      = ((1)<<16)|8;
    EDMA_PARAMSET0_DST          = (unsigned int)&B[0];
    EDMA_PARAMSET0_SRC_DST_BIDX = ((0)<<16)|0;
    EDMA_PARAMSET0_LINK_BCNTRLD = 0xFFFF;
    EDMA_PARAMSET0_SRC_DST_CIDX = 0;
    EDMA_PARAMSET0_CCNT         = 1;

    while(1);

}

 

Regards,

Marko

  • Can you check the debug checklist in Section : Tips A1, A2, Appendix B, in  http://focus.ti.com/lit/ug/spru987a/spru987a.pdf

    Can you ensure the Param entry to be used for trigger word is written to last, which I believe you are already doing.

    Regards

    Varada

     

     

  • I went over the check list, but was unable to determin what was expected to verify!

     

  • Is the QDMA channel enabled, via QEER register ?

    Refer 2.4.2.1 of the EDMA user guide.

     

  • Hi Varada,

    I have tried writing QEER but the QEER register is read only, so I enabled QDMA over QEESR register and the transfer got executed correctly.

    Now when the transfer is completed, what registers should I check for the transfer competition?

    Why I can not see the values for the PaRAM registers in the memory map . When I do  'View->Memory' in CCS and select location of PaRAM registers ( for example PaRAM0 at 0x01C04000 ) I don't see the HEX values at that location, just dashed lines '------'?

    Regards,

    Marko

     

  • Yes, QEESR register is the backend write register for QEER.

    Good to know the transfer goes thru.

     

    How to check for completion of the transfer ?

    There are various ways / type of completion feedback that the DMA engine gives. Refer section 2.5.

    1. Refer section 2.9 for details, for completion interrupts.

    2. You can also poll for completion, with IPR register.

    For debug : I highly recommend you to read  Section : Tips A1, A2, Appendix B, 

     

     

    Why PSet not visible ?

    Have you enabled the device memory map. Have you got a gel file ?

    You can specify  a Memory Map using a GEL script which will enable access to Memory mapped register.

    You get a sample gel file at : 

    http://c6000.spectrumdigital.com/evmdm6437/reve/

    Look under software resources. You see "DM6437 EVM Target Content". 

     

     


    One more thing if you see all zeros : Is your ParamSet static?

    If static, once the transfer is complete, Paramset is cleared.