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AMS[2..0] questions

Anonymous
Anonymous

Hi All,

 

I would like to ask a question on AMS[2..0] registers.

 

 

 

 

According to SPRS345d, AMS[2..0] are part of boot configuration pins. But after checking their connection in the schematics, I found that these pins actually connect to NOR (not considering SRAM and NAND here) address lines A0 and A1, as well as DQ15/A-1.

 

This seems pretty weird. Why the boot configuration pins are not connected to fixed voltage levels? What are the initial statuses of these pins when the DSP is booting? Do they depend on the status of EMIF devices (NAND, for example)?

 

 

 

Thanks,

Zheng

  • 0
    TI__Expert 5750 points

    THE AEM[0..2] pins are pin multiplexed. This is typically done to reduce the pin count of the device, while still providing functionality.

    Please refer 3.5.1.1. of the document for the details.

    So in the above case, AEM[0..2] are used for decide the initial mode of EMIFA, and these values at boot time will be latched in the register.

     

    Regards

    Varada

  • Anonymous
    0 Anonymous in reply to Varada Bellary

    Initially I missed the switch which could determines their initial states, now I see it. Thanks very much.

    Zheng