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AM3359: DP83822 Copper and Fiber support

Dilrosh P S
Prodigy 245 points

Part Number: AM3359
Other Parts Discussed in Thread: AMIC110, , SYSCONFIG, TLK110

Hi,

I have some doubts on AMIC110 ICE EVM

1. As you know LCD pins of AMIC processor is used for boot configuration and in AMIC110 EVM those pins are connected to the buffers(SN74LVC541ADGVR). We are using only two boot configuration (SPI- MMC0 & MMC0- SPI) and for doing that we required the LCD pins 0 to 5 and 12 to 15 (LCD_DATA0, LCD_DATA1, LCD_DATA2, LCD_DATA3, LCD_DATA4, LCD_DATA5, LCD_DATA12, LCD_DATA13,LCD_DATA14 & LCD_DATA15) all other LCD pins are don't care. So my question is whether we need to connect all the boot pins (0-15) to buffer (SN74LVC541ADGVR) or only the required signals (0 to 5 & 12-15)?

2. I'm trying to make a design in which AMIC110 + DDR+ eMMC+ SPI and 2 Ethernet PHYs are in one board (daughter board) and the all the peripherals(USB, RS232, RJ45 etc) in base board. If I place the buffer (SN74LVC541ADGVR) in the base board then all the boot configuration signals need to terminate in the daughter board inorder to make a contact with the base board. Since the same LCD boot signals are used as primary ethernet MII signals that will make a stub formation in the base board. Is that acceptable in the ethernet lines? So what all things I need to take care while doing this design?

3. Is there any reference schematic which I can go through for interfacing AM3359 and DP83822 ? 

Thanks in advance

Regards,

Dilrosh P S

  • 0
    TI__Guru* 94981 points

    Dilrosh,

    1. For the boot pins which are don't care, you do not need to connect those signals to the buffer since the state of the pins is irrelevant for the boot modes you are using.

    2.  I would recommend putting the buffers on the daughter board with the processor, and routing through to keep the stubs as short as possible when the buffer is disabled.  You could also consider rearranging the pin assignment to avoid conflicts with the boot signals.  For example, pr1_mii0 is available on 2 sets of pins.  You can get help with pinmux reassignment using the SYSCONFIG tool to help reassign pins https://www.ti.com/tool/SYSCONFIG

    3.  The AMIC110 ICE board has DP83822, which would be a good reference for the AM335x.  

    Regards,

    james

  • 0 in reply to JJD
    Prodigy 245 points

    Dear James,

    Thank You for your reply

    There are couple more doubts to clear

    1. I already made a daughter board with two ethernet and the buffers in the base board in that one Ethernet is working fine and the 2nd Ethernet(with boot signals) is not working. So as per your feedback if I place the buffer in the daughter board then it will rectify my problem? right?

    2. While going through the AMIC110 ICE board I found a FET (SN74LVC2G66YZPR) which switches RXCLK and LED1 . What is the relevance of this FET? Why RX_CLK and LED1 is switched? Can we ignore the FET?

    3. In AM335x ICE board Ethernet reset is achieved by an AND gate but not mentioned in AMIC110 ICE board. Whether we want to use the same logic as in AM335x ICE board?

    Regards,

    Dilrosh

  • 0 in reply to JJD
    Prodigy 245 points

    Dear James,

    Thank You for your reply

    There are couple more doubts to clear

    1. I already made a daughter board with two ethernet and the buffers in the base board in that one Ethernet is working fine and the 2nd Ethernet(with boot signals) is not working. So as per your feedback if I place the buffer in the daughter board then it will rectify my problem? right?

    2. While going through the AMIC110 ICE board I found a FET (SN74LVC2G66YZPR) which switches RXCLK and LED1 . What is the relevance of this FET? Why RX_CLK and LED1 is switched? Can we ignore the FET?

    3. In AM335x ICE board Ethernet reset is achieved by an AND gate but not mentioned in AMIC110 ICE board. Whether we want to use the same logic as in AM335x ICE board?

    Regards,

    Dilrosh

  • 0 in reply to Dilrosh P S
    TI__Guru* 94981 points

    Hi Dilrosh,

    1.  ensure that the buffers are truly disabled when using the PHY signals, but other than that, i think the stub created through the connectors is highly suspect.  You can maybe even probe the signals and comparing with the PHY that is directly connected.  Or, you can sacrifice one board can cut the signals to the base board to remove the stub and see if things improve.  

    2.  This is explained in section 2.1.1 of the user's guide: https://www.ti.com/lit/pdf/spruie6  It is used to isolate the PHY signals which could be driven during bootstrap latching.  

    3. The  AM335x EVM design used the warm reset signal to keep the TLK110 PHYs in reset during the latching of the boot pins for the AM335x.  I believe this was not adequate for the PHYs used on the AMIC110, and that is why the FET and buffers are used to isolate the signals during boot pin latching.

    Regards,

    James

  • 0 in reply to JJD
    Prodigy 245 points

    Dear James,

    1. The Ethernet which is connected to the boot sequence is not working but phy is detected. I can't cut the tracks as those signals are also used for boot sequence. If I cut the tracks then booting will not happen.

    2. I could understand why only those two signals connected to FET. In user guide it is not mentioned properly.

    3. Is there any other buffer IC you can suggest? My daughter board is very small (67.6 X 33.2) I couldn't find any smaller package buffers which can support 10 inputs.

    Regards 

    Dilrosh

  • 0 in reply to Dilrosh P S
    TI__Guru* 94981 points

    1. OK, yes, wasn't sure if you could test the interface without booting via JTAG download or something.  I think the PHY detect is over MDIO, so that makes sense that if starts failing when data is being sent.

    2  I think it has something to do with the state of those signals around reset.  RX_CLK is an output from the PHY during reset, let me see if i can get more info.

    3.  I don't know if there is anything smaller.  You would have to reduce the number of inputs.  Let me discuss options with a colleague, and get back to you next week.

    Regards,

    James

  • 0 in reply to JJD
    TI__Guru* 94981 points

    Hi Dilrosh,

    there are not many options here with the topology you have.  With the buffers on the base board, that presents a long stub which will always be potentially problematic as you have seen.  With the PHY you chose, the only way to ensure proper operation is to move the buffers to the baseboard and mimic the topology on the ICE board.

    Regards,

    James