Part Number: AM4378
Good day TI Team,
On the custom board based on TI AM437x GP evm, we use the same NAND as MT29F4G08ABADAWP used on the GP .
From the u-boot, I couldn't able to write to the NAND. I can able to erase on the first time but cannot write. I have also changed the ecc from OMAP_ECC_BCH16_CODE_HW to OMAP_ECC_BCH8_CODE_HW as I was getting ecc errors.
Here is the log:
<debug_uart> Passed early_system_init() Under enable_board_pin_mux.... 1 Passed board_early_init_f() Passed sdram_init() U-Boot SPL 2019.01-g333c3e72d3 (Nov 24 2020 - 05:57:47 +0000) Trying to boot from MMC1 SPL: Please implement spl_start_uboot() for your board SPL: Direct Linux boot not active! U-Boot 2019.01-g333c3e72d3 (Nov 24 2020 - 05:57:47 +0000) CPU : AM437X-GP rev 1.2 Model: TI AM437x GP EVM DRAM: 1 GiB PMIC: TPS65218 NAND: Found nand.. nand: selected OMAP_ECC_BCH8_CODE_HW device found, Manufacturer ID: 0x2c, Chip ID: 0xdc Micron MT29F4G08ABADAH4 512 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64 512 MiB Luma MMC: OMAP SD/MMC: 0 Loading Environment from FAT... OK Net: No ethernet found. Hit any key to stop autoboot: 0 => => nand erase 0 0x20000 NAND erase: device 0 offset 0x0, size 0x20000 nand_erase_nand: start = 0x000000000000, len = 131072 Under nand_check_wp.. Status register: 0xe0 Erasing at 0x0 -- 100% complete. OK => mw.b 0x82000000 0xff 0x1000 => mw.b 0x82000000 0xfe 1 => nand write.raw 0x82000000 0x0 0x1 NAND write: Under nand_check_wp.. Status register: 0x60 raw_access: error at offset 0, ret -5 2112 bytes written: ERROR => nand erase 0 0x20000 NAND erase: device 0 offset 0x0, size 0x20000 nand_erase_nand: start = 0x000000000000, len = 131072 Under nand_check_wp.. Status register: 0x60 nand_erase_nand: device is write protected! nand0: MTD Erase failure: -5 OK =>
I have enable the debug in files: driver/mtd/nand/raw/nand_base.c and driver/mtd/nand/raw/omap_elm.c
Also added debug in nand_check_wp function under driver/mtd/nand/raw/nand_base.c
static int nand_check_wp(struct mtd_info *mtd)
{
struct nand_chip *chip = mtd_to_nand(mtd);
/* Broken xD cards report WP despite being writable */
if (chip->options & NAND_BROKEN_XD)
return 0;
/* Check the WP bit */
chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
printf("Under nand_check_wp.. Status register: 0x%x\n", chip->read_byte(mtd));
return (chip->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1;
}
Please find the hardware schematics snip:
If I remove or populate the R410 (DNF) with zero ohm resistor, the issue remains the same.
I have tried to follow links to get some hint but invain:
e2e.ti.com/.../1964691 e2e.ti.com/.../571584
Any pointers are welcome. Please share if you need more info.
Regards,
Ankur
