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PROCESSOR-SDK-DRA8X-TDA4X: GPIO interrupt

Part Number: PROCESSOR-SDK-DRA8X-TDA4X


Hi,

We try to use GPIO Port 0 Pin 97 as GPIO Interrupt and connect to MCU2_0.
A test code was modified in vision_apps/apps/.../app_tirtos/tirtos_linux/mcu2_0/main.c
Please see the attached file.

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#include <app.h>
#include <oToUtils/console_io/include/app_log.h>
#include <oToUtils/ethfw/include/app_ethfw.h>
#include <stdio.h>
#include <string.h>
#include <xdc/runtime/Error.h>
#include <ti/sysbios/BIOS.h>
#include <ti/sysbios/knl/Task.h>
#include <app_ipc_rsctable.h>
#include "app_cfg_mcu2_0.h"

#define SOC_J721E

#include <ti/board/board.h>
#include <ti/drv/gpio/GPIO.h>
#include <ti/drv/gpio/soc/GPIO_soc.h>
#include <ti/csl/csl_types.h>
#include <ti/csl/soc.h>

/* GPIO Driver board specific pin configuration structure */
GPIO_PinConfig gpioPinConfigs[] = {
    GPIO_DEVICE_CONFIG(0x0, 97)  | GPIO_CFG_INPUT | GPIO_CFG_IN_INT_BOTH_EDGES,
	GPIO_DEVICE_CONFIG(0x0, 103) | GPIO_CFG_INPUT | GPIO_CFG_IN_INT_BOTH_EDGES,
};

/* GPIO Driver call back functions */
GPIO_CallbackFxn gpioCallbackFunctions[] = {
	NULL,
	NULL,
};

/* GPIO Driver configuration structure */
GPIO_v0_Config GPIO_v0_config = {
    gpioPinConfigs,
    gpioCallbackFunctions,
    sizeof(gpioPinConfigs) / sizeof(GPIO_PinConfig),
    sizeof(gpioCallbackFunctions) / sizeof(GPIO_CallbackFxn),
    0x8U,
};

static void app_gpio_callback_test0(void)
{
     printf("@@@@@@@@@@@@%s\n", __FUNCTION__);
}

static void app_gpio_callback_test1(void)
{
    printf("@@@@@@@@@@@@%s\n", __FUNCTION__);
}

static void gpioDbg()
{
    uint32_t val=0;
    uint32_t idx=0; 

    for(idx = 0; idx < 2; idx ++)
    {
        val = GPIO_read(idx);
        appLogPrintf("[%s]%03d=%d\n", __FUNCTION__, idx, val);
    }
}

static Void appMain(UArg arg0, UArg arg1)
{
    appInit();
    appRun();
    
    /*Init GPIO*/
    GPIO_init();    
    printf("!!!!!!!!!!!!!!%s %s\n",__DATE__,__TIME__);
    
    GPIO_setCallback(0, app_gpio_callback_test0);
    GPIO_enableInt(0);
    GPIO_setCallback(1, app_gpio_callback_test1);
    GPIO_enableInt(1);
    
    gpioDbg();
    #if 1
    while(1)
    {
        appLogWaitMsecs(100u);
        gpioDbg();
    }
    #else
    appDeInit();
    #endif
}

void StartupEmulatorWaitFxn (void)
{
    volatile uint32_t enableDebug = 0;
    do
    {
    }while (enableDebug);
}

static uint8_t gTskStackMain[8*1024]
__attribute__ ((section(".bss:taskStackSection")))
__attribute__ ((aligned(8192)))
    ;

int main(void)
{
    Task_Params tskParams;
    Error_Block eb;
    Task_Handle task;

    /* This is moved before the wait function as NDK comes up with BIOS 
        and looks for semaphore handle created by appEthFwEarlyInit() */
#ifdef ENABLE_ETHFW
    appEthFwEarlyInit();
#endif

    /* This is for debug purpose - see the description of function header */
    StartupEmulatorWaitFxn();

    Error_init(&eb);
    Task_Params_init(&tskParams);

    tskParams.arg0 = (UArg) NULL;
    tskParams.arg1 = (UArg) NULL;
    tskParams.priority = 8u;
    tskParams.stack = gTskStackMain;
    tskParams.stackSize = sizeof (gTskStackMain);
    task = Task_create(appMain, &tskParams, &eb);
    if(NULL == task)
    {
        BIOS_exit(0);
    }
    BIOS_start();

    return 0;
}

uint32_t appGetDdrSharedHeapSize()
{
    return DDR_SHARED_MEM_SIZE;

}

We manually change the voltage level of this GPIO pin for testting.
The test result was the callback function of GPIO interrupts never be triggered, but GPIO input value are fined by polling.

How can we config the GPIO interrupt correctly?

Br,
KS.

  • Hi KS,

    GPIO0 is allocated to A72, so cannot be used on mcu2_0. I think the same pin can also be used on GPIO4, so can you try using GPIO4 module and configure pinmux to use this pin on GPIO4?

    Rgds,

    Brijesh

  • Hi, 

    Because The TDA4 board is our design, so it's difficult to try GPIO4.

    We will try to find out non use pin for GPIO4.

    1. Can you give any other suggestion? If we can't try GPIO4 pin.

    2. Which document describe GPIO interrupt and CPU relationship?

    KS.

  • Hi Brijesh,

    I have same question,how to  configure  GPIO4 module and  pinmux to use this pin on GPIO4?

  • Hi,

    In the pinmux register, VGPIO_SEL field (BITS[5:4]) can be used to change GPIO module for the same pin.. 

    Regarding GPIO4 configuration, it will be same way as you are configuring GPIO0..

    Regards,

    Brijesh

  • Hi KS,

    The same pin has an option to use on GPIO0 or GPIO4, by selecting VGPIO_SEL field in the pinmux register. So you could easily switch to GPIO4 for the same pin.. 

    Regards,

    Brijesh

  • Hi,

    After VGPIO_SEL=0x2 setting, I had tried GPIO4 , but GPIO interrupt still not worked(polling status is fine).

    Ks.

     

  • Hi KS,

    Do you mean GPIO_STAT is correct, but there is no interrupt?

    Do you have CCS to connect to R5F core? If yes, can you put breakpoint on API GPIO_socConfigIntrPath and see if it is getting successfully executed? I want to check if irq is registered correctly, ie Sciclient_rmIrqSet returns success.. 

    Regards,

    Brijesh

  • Hi, 

    We can focus on GPIO4 Pin 97.

    I calculate this pin is point to Bank 6 Pin 1, right?

    so I checked the bit[1] status.

    There is the HW register status, GPIO_INTSTAT shows "interrupt occurred".

    Br,

    KS

  • Hi, 

    I run CCS to debug GPIO_socConfigIntrPath(), 

    Sciclient_rmIrqSet was return failed.

    Please see the following picture.

    So how can I solve this issue?

    KS

  • Hi Li,

    That's exactly why you are not getting interrupts.. GPIO is configured correctly, but not interrupt manager.

    Can you share the value of rmIrqReq.src_id, rmIrqReq.src_index, rmIrqReq.dst_id and rmIrqReq.dst_host_irq?

    Regards,

    Brijesh

  • Hi Li,

    I guess you are using MCU2_0 and SDK7.0 release. In this case, can you please try setting below?

    rmIrqReq.src_id = TISCI_DEV_GPIO4

    rmIrqReq.src_index = 97/16; // 97 is the GPIO pin number

    rmIrqReq.dst_id = TISCI_DEV_R5FSS0_CORE0;

    rmIrqReq.dst_index = 24;

    Then you need to make sure that the interrupt 24 is registered to bios in GPIO_setConfig_v0 API in the pdk_jacinto_07_00_00\packages\ti\drv\gpio\src\v0\GPIO_v0.c file.

    The other way to do is

    GPIO_v0_HwAttrs gpio_cfg;

    GPIO_IntCfg       *intCfg;

    GPIO_socGetInitCfg(4, &gpio_cfg);

    intCfg = gpio_cfg->intCfg;

    intCfg[97].intNum = 24;

    GPIO_socSetInitCfg(4, &gpio_cfg);

    Please see if this works.

    Regards,

    Brijesh

    Regards,

    Brijesh

  • Hi, 

    Yes, I use MCU2_0 and PSDK7.0 release.

    I will try your suggestion.

    -------------------------------------------------------------------

    GPIO_v0_HwAttrs gpio_cfg;

    GPIO_IntCfg       *intCfg;

    GPIO_socGetInitCfg(4, &gpio_cfg);

    intCfg = gpio_cfg->intCfg;

    intCfg[97].intNum = 24;

    GPIO_socSetInitCfg(4, &gpio_cfg);

    -------------------------------------------------------------------

    Here are the data of rmIrqReq.

    I also traced to the return fail value is  from Sciclient_rmParamIsValid(). F.Y.R.

    KS.

  • Hi,

    The parameters does seem to be correct still..

    Can you put breakpoint on GPIO_socConfigIntrPath API and just before calling Sciclient_rmIrqSet APi in the in the same function, can you change the rmIrqReq parameters to 

    rmIrqReq.src_id = 109

    rmIrqReq.src_index = 6

    rmIrqReq.dst_id = 245

    rmIrqReq.dst_index = 24

    and just call Sciclient_rmIrqSet to see if it succeeds?

    Rgds,

    Brijesh

  • Hi, 

    Because MAIN R5F0_0 disconnecting occurred frequently, I got these parameter informations by printing log.

    Two  status, 

    1.

    GPIO_soc.c only build on BUILD_MCU1_0

    So I have to modify parameters in BUILD_MCU1_0 block.

    I compiled mcu2_0 process in psdk_rtos_auto_j7_07_00_00_11/vision_apps

    The building command is "make sdk"

    2.

    AfterI forced these parameters in GPIO_socConfigIntrPath().

    Sciclient_rmIrqSet() still returned fail.

    The log result is,

    [MCU2_0] 21.596775 s: [GPIO_socConfigIntrPath 777]src_id=109, src_index=6, dst_id=245, dst_host_irq=24
    [MCU2_0] 21.596863 s: [GPIO_socConfigIntrPath 810]rmIrqReq.src_id=109, rmIrqReq.src_index=6, rmIrqReq.dst_id=245, rmIrqReq.dst_host_irq=24
    [MCU2_0] 21.597007 s: [GPIO_socConfigIntrPath 838]retVal=-1

    KS

     

  • Hi KS,

    ok, this might requires some more experimentation, so please help in doing these experiments. 

    Instead of using irq number 24, can you try irq number 176 to 192 and see if any of them works?

    rmIrqReq.src_id = 109

    rmIrqReq.src_index = 6

    rmIrqReq.dst_id = 245

    rmIrqReq.dst_index = 176 to 192 // keep changing and see if any irq number works..

    Regards,

    Brijesh

  • Hi, 

    Here is the test result.

    Sciclient_rmIrqRelease return 0 util  irq number-184.

    [MCU2_0] 21.305467 s: [GPIO_socConfigIntrPath 779]src_id=109, src_index=6, dst_id=245, dst_host_irq=176
    [MCU2_0] 21.305550 s: [GPIO_socConfigIntrPath 811]rmIrqReq.src_id=109, rmIrqReq.src_index=6, rmIrqReq.dst_id=245, rmIrqReq.dst_host_irq=176
    [MCU2_0] 21.305831 s: [GPIO_socConfigIntrPath 839]retVal=-1
    [MCU2_0] 21.305895 s: [GPIO_socConfigIntrPath 779]src_id=109, src_index=6, dst_id=245, dst_host_irq=177
    [MCU2_0] 21.305969 s: [GPIO_socConfigIntrPath 811]rmIrqReq.src_id=109, rmIrqReq.src_index=6, rmIrqReq.dst_id=245, rmIrqReq.dst_host_irq=177
    [MCU2_0] 21.306196 s: [GPIO_socConfigIntrPath 839]retVal=-1
    [MCU2_0] 21.306295 s: [GPIO_socConfigIntrPath 779]src_id=109, src_index=6, dst_id=245, dst_host_irq=178
    [MCU2_0] 21.306375 s: [GPIO_socConfigIntrPath 811]rmIrqReq.src_id=109, rmIrqReq.src_index=6, rmIrqReq.dst_id=245, rmIrqReq.dst_host_irq=178
    [MCU2_0] 21.306613 s: [GPIO_socConfigIntrPath 839]retVal=-1
    [MCU2_0] 21.306673 s: [GPIO_socConfigIntrPath 779]src_id=109, src_index=6, dst_id=245, dst_host_irq=179
    [MCU2_0] 21.306746 s: [GPIO_socConfigIntrPath 811]rmIrqReq.src_id=109, rmIrqReq.src_index=6, rmIrqReq.dst_id=245, rmIrqReq.dst_host_irq=179
    [MCU2_0] 21.306972 s: [GPIO_socConfigIntrPath 839]retVal=-1
    [MCU2_0] 21.307030 s: [GPIO_socConfigIntrPath 779]src_id=109, src_index=6, dst_id=245, dst_host_irq=180
    [MCU2_0] 21.307106 s: [GPIO_socConfigIntrPath 811]rmIrqReq.src_id=109, rmIrqReq.src_index=6, rmIrqReq.dst_id=245, rmIrqReq.dst_host_irq=180
    [MCU2_0] 21.307364 s: [GPIO_socConfigIntrPath 839]retVal=-1
    [MCU2_0] 21.307429 s: [GPIO_socConfigIntrPath 779]src_id=109, src_index=6, dst_id=245, dst_host_irq=181
    [MCU2_0] 21.307505 s: [GPIO_socConfigIntrPath 811]rmIrqReq.src_id=109, rmIrqReq.src_index=6, rmIrqReq.dst_id=245, rmIrqReq.dst_host_irq=181
    [MCU2_0] 21.307734 s: [GPIO_socConfigIntrPath 839]retVal=-1
    [MCU2_0] 21.307789 s: [GPIO_socConfigIntrPath 779]src_id=109, src_index=6, dst_id=245, dst_host_irq=182
    [MCU2_0] 21.307863 s: [GPIO_socConfigIntrPath 811]rmIrqReq.src_id=109, rmIrqReq.src_index=6, rmIrqReq.dst_id=245, rmIrqReq.dst_host_irq=182
    [MCU2_0] 21.308083 s: [GPIO_socConfigIntrPath 839]retVal=-1
    [MCU2_0] 21.308140 s: [GPIO_socConfigIntrPath 779]src_id=109, src_index=6, dst_id=245, dst_host_irq=183
    [MCU2_0] 21.308213 s: [GPIO_socConfigIntrPath 811]rmIrqReq.src_id=109, rmIrqReq.src_index=6, rmIrqReq.dst_id=245, rmIrqReq.dst_host_irq=183
    [MCU2_0] 21.308474 s: [GPIO_socConfigIntrPath 839]retVal=-1
    [MCU2_0] 21.308532 s: [GPIO_socConfigIntrPath 779]src_id=109, src_index=6, dst_id=245, dst_host_irq=184
    [MCU2_0] 21.308609 s: [GPIO_socConfigIntrPath 811]rmIrqReq.src_id=109, rmIrqReq.src_index=6, rmIrqReq.dst_id=245, rmIrqReq.dst_host_irq=184
    [MCU2_0] 21.308899 s: [GPIO_socConfigIntrPath 839]retVal=0

     Others,

    [MCU2_0] 21.594386 s: [GPIO_socConfigIntrPath 779]src_id=109, src_index=6, dst_id=245, dst_host_irq=185
    [MCU2_0] 21.594473 s: [GPIO_socConfigIntrPath 811]rmIrqReq.src_id=109, rmIrqReq.src_index=6, rmIrqReq.dst_id=245, rmIrqReq.dst_host_irq=185
    [MCU2_0] 21.594812 s: [GPIO_socConfigIntrPath 839]retVal=0
    [MCU2_0] 21.594874 s: [GPIO_socConfigIntrPath 779]src_id=109, src_index=6, dst_id=245, dst_host_irq=186
    [MCU2_0] 21.594947 s: [GPIO_socConfigIntrPath 811]rmIrqReq.src_id=109, rmIrqReq.src_index=6, rmIrqReq.dst_id=245, rmIrqReq.dst_host_irq=186
    [MCU2_0] 21.595008 s: [GPIO_socConfigIntrPath 839]retVal=0
    [MCU2_0] 21.595056 s: [GPIO_socConfigIntrPath 779]src_id=109, src_index=6, dst_id=245, dst_host_irq=187
    [MCU2_0] 21.595160 s: [GPIO_socConfigIntrPath 811]rmIrqReq.src_id=109, rmIrqReq.src_index=6, rmIrqReq.dst_id=245, rmIrqReq.dst_host_irq=187
    [MCU2_0] 21.595229 s: [GPIO_socConfigIntrPath 839]retVal=0
    [MCU2_0] 21.595281 s: [GPIO_socConfigIntrPath 779]src_id=109, src_index=6, dst_id=245, dst_host_irq=188
    [MCU2_0] 21.595353 s: [GPIO_socConfigIntrPath 811]rmIrqReq.src_id=109, rmIrqReq.src_index=6, rmIrqReq.dst_id=245, rmIrqReq.dst_host_irq=188
    [MCU2_0] 21.595413 s: [GPIO_socConfigIntrPath 839]retVal=0
    [MCU2_0] 21.595462 s: [GPIO_socConfigIntrPath 779]src_id=109, src_index=6, dst_id=245, dst_host_irq=189
    [MCU2_0] 21.595532 s: [GPIO_socConfigIntrPath 811]rmIrqReq.src_id=109, rmIrqReq.src_index=6, rmIrqReq.dst_id=245, rmIrqReq.dst_host_irq=189
    [MCU2_0] 21.595589 s: [GPIO_socConfigIntrPath 839]retVal=0
    [MCU2_0] 21.595637 s: [GPIO_socConfigIntrPath 779]src_id=109, src_index=6, dst_id=245, dst_host_irq=190
    [MCU2_0] 21.595706 s: [GPIO_socConfigIntrPath 811]rmIrqReq.src_id=109, rmIrqReq.src_index=6, rmIrqReq.dst_id=245, rmIrqReq.dst_host_irq=190
    [MCU2_0] 21.595764 s: [GPIO_socConfigIntrPath 839]retVal=0
    [MCU2_0] 21.595812 s: [GPIO_socConfigIntrPath 779]src_id=109, src_index=6, dst_id=245, dst_host_irq=191
    [MCU2_0] 21.595882 s: [GPIO_socConfigIntrPath 811]rmIrqReq.src_id=109, rmIrqReq.src_index=6, rmIrqReq.dst_id=245, rmIrqReq.dst_host_irq=191
    [MCU2_0] 21.595942 s: [GPIO_socConfigIntrPath 839]retVal=0
    [MCU2_0] 21.595989 s: [GPIO_socConfigIntrPath 779]src_id=109, src_index=6, dst_id=245, dst_host_irq=192
    [MCU2_0] 21.596057 s: [GPIO_socConfigIntrPath 811]rmIrqReq.src_id=109, rmIrqReq.src_index=6, rmIrqReq.dst_id=245, rmIrqReq.dst_host_irq=192
    [MCU2_0] 21.596138 s: [GPIO_socConfigIntrPath 839]retVal=0
    [MCU2_0] 21.596193 s: [GPIO_socConfigIntrPath 779]src_id=109, src_index=6, dst_id=245, dst_host_irq=193
    [MCU2_0] 21.596265 s: [GPIO_socConfigIntrPath 811]rmIrqReq.src_id=109, rmIrqReq.src_index=6, rmIrqReq.dst_id=245, rmIrqReq.dst_host_irq=193
    [MCU2_0] 21.596326 s: [GPIO_socConfigIntrPath 839]retVal=0

     

     

    K.S

  • Hi KS,

    ok that's good, exactly 8 irqs from 176 is passing. It is matching with my expectation.

    ok now, GPIO is registering interrupt to sysbios in the API GPIO_setConfig_v0 in the file psdk_rtos_auto_j7_07_00_00_11\pdk_jacinto_07_00_00\packages\ti\drv\gpio\src\v0\GPIO_v0.c. just before it calls GPIO_osalRegisterInterrupt API, change the value of interruptRegParams.corepacConfig.intVecNum to 184 and see if you are getting interrupt callback? 

    We are now trying to register correct irq number to sysbios. So when GPIO generates interrupt, it should trigger ISR. The master isr function is GPIO_v0_hwiFxn. Please put breakpoint on this function and see if it gets triggered..

    Regards,

    Brijesh

  • Hi, 

    Modified interruptRegParams.corepacConfig.intVecNum to 184,

    To put both breakpoint at GPIO_v0_hwiFxn and my callback function - app_gpio_callback_test0 for GPIO4_PIN97,

    They aren't triggered.

    KS

  • Hi KS,

    Looks like too complex.

    I would suggest to directly register irq in the application.  Can you try adding below code in your application and see if it gets triggered?

    +#include <ti/osal/osal.h>

    HwiP_Params                         hwiParams;

    HwiP_Handle                         intrHndl;

    HwiP_Params_init(&hwiParams);

    intrHndl = HwiP_create(184, &YourGPIOIsr, &hwiParams);
    if (NULL == intrHndl)
    {
               printf ("Failed to register interrupt \n");
               return ;
    }

    Regards,

    Brijesh

  • Hi,

    In order to verify this issue simply and create a simple application loading from ccs, I refer the sample test application in pdk_jacinto_07_00_00/packages/ti/drv/gpio/test/led_blink.
    I found one difference for GPIO configuration - GPIO_configIntRouter().

    I add it to my test code.
    If GPIO_configIntRouter() called, the callback function will be triggered.
    Note: to add intCfg[pinNum].intNum = 178 + bankNum(=184) for MCU2_0

    I don't know why, please check it and provide correct usage of GPIO interrupt.
    1.Which parameters should I set?
    2.What number for each parameter should I give?

    KS.

  • Hi KS,

    ok, that's good news.

    We just need to set intNum, That should be good enough..

    Regards,

    Brijesh 

  • Hi, 

    When I implement other GPIO ISRs on other CPUs, such as MCU1_0/A72/....

    Which intNum do I need to set?

    KS.

  • Hi KS,

    Yes, interrupt number will change depending on the code. I think we have allocated 4 GPIO interrupts to each core in SDK7.0. So according to the core, where you are enabling GPIO, interrupt number and also core id will change. 

    Could you help me understand on which core you are planning to enable GPIO?

    Regards,

    Brijesh