• State TI Thinks Resolved
  • Locked Locked
  • Replies 3 replies
  • Answers 1 answer
  • Subscribers 98 subscribers
  • Views 224 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AM3358: am3358

li shu
Prodigy 100 points
Part Number: AM3358


Hi,

my design need connect the am3358 with 6 SPI slave devices, I try to use the McSPI module inside the am3358, attached is my diagram, could you help to confirm the McSPI can support this kind of design?

thanks,

Li

AM3358 McSPI design.docx

  • 0
    TI__Mastermind 28695 points

    LI

    You have SPI1 configured as a standard 2 channel bi directional configuration.

    For SPI0, the labeling SPI0_CS0 & ARM_GPIOA_SPI0_CS0, along with SPI0_CS1 & ARM_GPIOB_SPI0_CS1 is unclear. Can you clarify what you are trying/expecting to do with the CS signals?  All controlled by software? 

    Looks like devices 2-5 are all single directional. Rather than try to control the direction of SPI0_D0, it may be better to have all transmitters connected to D1 and all receivers connected to D0 (or vise versa if it make sense). That way, you should be able to use the multi-channel feature while generating the (4) CS signals via s/w using GPIO pins. 

    --Paul

  • 0 in reply to PaulM
    Prodigy 100 points

    Hi Paul,

    thanks for your suggestions.

    1. the SPI slave devices #2 and #3 are NOT the "single directional", they are "Input and output" on single pin D0(half duplex). Only the devices #4 and #5 are "single directional", the AM3358 use the SPI0_D1 output the data to both devices.

    2. I use the standard "SPI0_CS0" as the chip select signal to control the devices #2, and our firmware engineer will program some code to generate similar "CS" signal from the "ARM_GPIO_A" pin to control the devices #3, all controlled by software.

    The devices#2 and devices#3 are totally independent( on timing and contents), they just share the "SPI0_SCk", "SPI0_D0" bus interface, but use the different "SPI0_CS0" and "ARM_GPIOA_SPI0_CS0" chip select signals to separate them. same design consideration on the devices #4 and #5.

    do you think my design is OK for McSPI model in the AM3358(because I have 6 SPI slave devices in the design, can the McSPI handle so many slave devices)?

    thanks,

    Li

  • 0 in reply to li shu
    TI__Mastermind 28695 points

    OK,  the diagram you provided implied that #2 was transmit and #3 was receive.

    Each SPI module is designed to handle 4 devices (4 channels). The implementation in the AM335x devices only supports CS0 and CS1, CS2 and CS3 are not pinned out.  However, as you noted in your implementation, s/w can implement CS signal using GPIOs. However, you don't have to use the channels in order to support multiple devices.  

    Perhaps the following configuration would work better for your use case.

    SPI0_D0 becomes you half duplex tx/rx for devices 2 & 3, and also the tx to device 5.   SPI0_D1 is the rx from device 4. 

    S/W would control CSx as well as direction control for SPI0_D0.

    It may even be possible to connect devices 2 & 3 to the SPI0_D1 pin as long as the SPI0_D0 driver is disabled when receiving data from device 4. 

    This would have to be prototyped to validate the functionality devices 2 & 3.

    --Paul