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Missing GND balls in ZCN escape package layout example ?

Other Parts Discussed in Thread: AM3505, AM3517

Hi,

I started a AM3505 design, and want to try to route the board with 4 layers. Thus I follow instructions of the http://processors.wiki.ti.com/index.php/AM35x_VCA_PCB_layout page as a starting point for the routing. But if I am not wrong, it seems balls G20 and G21 (VSS) are not connected on the example !?

So where to put the via to connect these two balls to gnd layer ?I don't see any place to put it !?

 

Regards,

Cyril HAENEL

  • Hi:

    There are different package for AM3517/3505. If package is "ZCN (17x17)" G20,G21 are VSS, but "ZER (23x23) G20,G21 are signal pins. FYR~

  • Hi,

     

    Sorry but I don't understand your answer, it's true that ZCN and ZER are completely differents packages, but I work on ZCN package and the page http://processors.wiki.ti.com/index.php/AM35x_VCA_PCB_layout is about routing the ZCN package. And on the ZCN package, balls G20/G21 are VSS and we can see that these balls are not connected on the images.

    Thus my question is : how can we connect these balls, it seems there is no free place to put a via !!

    Regards

     

  • As another reference, you may want to check craneboard.org.  This is a open source 4 layer board which should give an example of how to connect G20/G21.  The wiki should be used more as a reference of how VCA is accomplished.  I believe it was written before 100% pin out was defined on AM3517.

     

    regards,

    James

  • Thank you very much for your answer, it seems craneboard will be a good reference for starting point !

     

    Regards,

     

    Cyril HAENEL

  • There is a possibility that the data manual is not correct and these pins may not be connected in the package.  Hopefully we should know the answer in a couple of days.  I will reply with an update as soon as the internal connections of these pins are confirmed.

     

    Regards,

    Paul

  • The current production version of the AM35x device does not have anything connected to BGA balls G20 and G21.  The data manual has these terminals listed as VSS because the package substrate provides an option to connect additional grounds signal to these pins.  

    The escape routing document was created before the decision was made to change the G20 and G21 terminal assignments from NC to VSS.

    At this time there are no plans to use these terminals as VSS.  Therefore, you can follow the wiki article example and not connect these terminals, or you can modify the example to connect these terminals to VSS. 

    In the wiki article example there are three vias to the left of G20 and G21.  The nearest via is connected to H20, the next via over to the left is connected to VDD_SHV, and the next via to the left is connected to VDDS.  One good choice would be to reassign the VDDS via to VDD_SHV, reassign the VDD_SHV via to H20, and use the H20 via as VSS for G20 and G21.

     

    Regards,

    Paul

     

  • The ZCN symbol on the AM35xx product pages has G20 and G21 defined as GNDs an we have connected them accordingly. Are there any plans to add the GND connections to the substrate in the future (Rev B or above?). If not are we safe to remove them in future boards without suddenly needing to reconnect them?

    There have been several descrepancies in the documentation regarding the pin out, eg U2 and V1 requiring PUs and are still labelled "Reserved" in the latest symbol which implies NC. The latest symbol was released at the beginning of March and is incorrect if I am reading this thread correctly. Is there any chance of the symbols and datasheet being reviewed within TI by the package designers to ensure everything is correct?

    Andy

  • The TI official recommendation is defined by the data sheet which says G20 and G21 are ground.  However, the balls are not connected in current production devices and at this time there are no plans to connect these balls inside the package. 

     

    With respect to balls U2 and V1, I just downloaded the ZCN schematic symbol from the AM3517 product page and found the zip file has a date of December 1, 2010 and the symbol file has a date of August 26, 2010.  This version of the schematic symbol shows U2 and V1 as reserved which matches the current version of the data manual SPRS550 revision B which was revised July 2010.  Reserved does not imply a no connect.  The data manual has a note attached to balls U2 and V1 which say they must be pulled high with 10k ohm resistors for proper operation.

     

    Regards,

    Paul

  • Thank you very much for your answers and precisions.

    I can continue to route my board with these informations.

    I also asked the routing from the craneboard in pdf format and I don't reinvent the wheel, I follow the same routing for power layers and different supplies.

    Now I need to think about routing the DDR, I choosed to mount a single chip in 32 bits configuration and it seems it will not be easy to route it with respect of wire lenght matching and wire isolation !!

     

    Regards,

    Cyril