TDA4VM: SDK7.0 SGMII on EVM is not working

Eric Chen9

Intellectual 950 points

Part Number: TDA4VM

Hi TI members,

SGMII on our custom board does not link up, so I went back to try it on EVM.

Below is what I have done:

1. Disable PCIe0 in linux device tree.

2. Disable loading main r5f from SPL. Load j7-main-r5f0_0-fw by dorprocboot instead.

3. Link to cpsw_apputils_full.aer5f instead of cpsw_apputils.aer5f.

4. Define ENABLE_QSGMII_PORTS

There is only one line output by ethfw:

QSGMII board detected

Then, ethfw got stuck.

What did I do wrong here?

Best regards,

Eric Chen

over 4 years ago

0 Vineet Roy over 4 years ago

TI__Mastermind 37435 points

I am checking with the experts

Regards

Vineet

0 Eric Chen9 over 4 years ago in reply to Vineet Roy

Intellectual 950 points

Hi Vineet,

Thanks for your reply.

Here is the detail of the modification I have done.

Hope it is helpful for the analyzing.

Fullscreen linux-ti-staging_modification.txt Download

diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
index 6788a3611907..186f3ad34a72 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
@@ -813,6 +813,7 @@
        phys = <&serdes0_pcie_link>;
        phy-names = "pcie_phy";
        num-lanes = <1>;
+       status = "disabled";
 };
 
 &pcie1_rc {
@@ -863,8 +864,8 @@
 };
 
 &serdes_ln_ctrl {
-       idle-states = <SERDES0_LANE0_PCIE0_LANE0>, <SERDES0_LANE1_PCIE0_LANE1>,
-                     <SERDES1_LANE0_PCIE1_LANE0>, <SERDES1_LANE1_PCIE1_LANE1>,
+       //idle-states = <SERDES0_LANE0_PCIE0_LANE0>, <SERDES0_LANE1_PCIE0_LANE1>,
+       idle-states = <SERDES1_LANE0_PCIE1_LANE0>, <SERDES1_LANE1_PCIE1_LANE1>,
                      <SERDES2_LANE0_PCIE2_LANE0>, <SERDES2_LANE1_PCIE2_LANE1>,
                      <SERDES3_LANE0_USB3_0_SWAP>, <SERDES3_LANE1_USB3_0>,
                      <SERDES4_LANE0_EDP_LANE0>, <SERDES4_LANE1_EDP_LANE1>, <SERDES4_LANE2_EDP_LANE2>, <SERDES4_LANE3_EDP_LANE3>;
@@ -913,3 +914,7 @@
 &main_uart2 {
        status = "disabled";
 };
+
+&serdes_wiz0 {
+       status = "disabled";
+};
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
index c036df124740..3a8e950690eb 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
@@ -53,14 +53,14 @@
                serdes_ln_ctrl: serdes_ln_ctrl@4080 {
                        compatible = "mmio-mux";
                        #mux-control-cells = <1>;
-                       mux-reg-masks = <0x4080 0x3>, <0x4084 0x3>, /* SERDES0 lane0/1 select */
-                                       <0x4090 0x3>, <0x4094 0x3>, /* SERDES1 lane0/1 select */
+                       //mux-reg-masks = <0x4080 0x3>, <0x4084 0x3>, /* SERDES0 lane0/1 select */
+                       mux-reg-masks = <0x4090 0x3>, <0x4094 0x3>, /* SERDES1 lane0/1 select */
                                        <0x40a0 0x3>, <0x40a4 0x3>, /* SERDES2 lane0/1 select */
                                        <0x40b0 0x3>, <0x40b4 0x3>, /* SERDES3 lane0/1 select */
                                        <0x40c0 0x3>, <0x40c4 0x3>, <0x40c8 0x3>, <0x40cc 0x3>;
                                        /* SERDES4 lane0/1/2/3 select */
-                       idle-states = <SERDES0_LANE0_PCIE0_LANE0>, <SERDES0_LANE1_PCIE0_LANE1>,
-                                     <SERDES1_LANE0_PCIE1_LANE0>, <SERDES1_LANE1_PCIE1_LANE1>,
+                       //idle-states = <SERDES0_LANE0_PCIE0_LANE0>, <SERDES0_LANE1_PCIE0_LANE1>,
+                       idle-states = <SERDES1_LANE0_PCIE1_LANE0>, <SERDES1_LANE1_PCIE1_LANE1>,
                                      <SERDES2_LANE0_PCIE2_LANE0>, <SERDES2_LANE1_PCIE2_LANE1>,
                                      <MUX_IDLE_AS_IS>, <SERDES3_LANE1_USB3_0>,
                                      <SERDES4_LANE0_EDP_LANE0>, <SERDES4_LANE1_EDP_LANE1>, <SERDES4_LANE2_EDP_LANE2>, <SERDES4_LANE3_EDP_LANE3>;

Fullscreen u-boot-k3-r5_modification.txt Download

diff --git a/arch/arm/mach-k3/j721e_init.c b/arch/arm/mach-k3/j721e_init.c
index 586f3e4fbc..52fc253a3c 100644
--- a/arch/arm/mach-k3/j721e_init.c
+++ b/arch/arm/mach-k3/j721e_init.c
@@ -514,29 +514,6 @@ void start_non_linux_remote_cores(void)
        int size = 0, ret;
        u32 loadaddr = 0;
 
-       size = load_firmware("mainr5f0_0fwname", "mainr5f0_0loadaddr",
-                            &loadaddr);
-       if (size <= 0)
-               goto err_load;
-
-       /* assuming remoteproc 2 is aliased for the needed remotecore */
-       ret = rproc_load(2, loadaddr, size);
-       if (ret) {
-               printf("Firmware failed to start on rproc (%d)\n", ret);
-               goto err_load;
-       }
-
-       ret = rproc_start(2);
-       if (ret) {
-               printf("Firmware init failed on rproc (%d)\n", ret);
-               goto err_load;
-       }
-
-       printf("Remoteproc 2 started successfully\n");
-
        return;
-
-err_load:
-       rproc_reset(2);
 }
 #endif

Fullscreen vision_apps_modification.txt Download

diff --git a/apps/basic_demos/app_tirtos/bios_cfg/ndk.cfg b/apps/basic_demos/app_tirtos/bios_cfg/ndk.cfg
index 424f367..49609f5 100644
--- a/apps/basic_demos/app_tirtos/bios_cfg/ndk.cfg
+++ b/apps/basic_demos/app_tirtos/bios_cfg/ndk.cfg
@@ -63,7 +63,7 @@
 /* ================ General configuration ================ */
 function init(ndkCfgArg)
 {
-    var enableStaticIP         = 0;
+    var enableStaticIP         = 1;
     var enableTelnet           = 1;
 
     /* NDK modules */
diff --git a/apps/basic_demos/app_tirtos/tirtos_linux/mcu2_0/concerto.mak b/apps/basic_demos/app_tirtos/tirtos_linux/mcu2_0/concerto.mak
index da9ae22..06c9ae6 100755
--- a/apps/basic_demos/app_tirtos/tirtos_linux/mcu2_0/concerto.mak
+++ b/apps/basic_demos/app_tirtos/tirtos_linux/mcu2_0/concerto.mak
@@ -70,7 +70,8 @@ ADDITIONAL_STATIC_LIBS += nimucpsw.aer5f
 ADDITIONAL_STATIC_LIBS += cpswsoc.aer5f
 ADDITIONAL_STATIC_LIBS += cpsw.aer5f
 ADDITIONAL_STATIC_LIBS += cpsw_cfgserver.aer5f
-ADDITIONAL_STATIC_LIBS += cpsw_apputils.aer5f
+#ADDITIONAL_STATIC_LIBS += cpsw_apputils.aer5f
+ADDITIONAL_STATIC_LIBS += cpsw_apputils_full.aer5f
 ADDITIONAL_STATIC_LIBS += pm_lib.aer5f
 ADDITIONAL_STATIC_LIBS += ti.timesync.hal.aer5f
 ADDITIONAL_STATIC_LIBS += ti.timesync.ptp.aer5f
diff --git a/utils/ethfw/src/app_ethfw.c b/utils/ethfw/src/app_ethfw.c
index c110ffd..685aca6 100644
--- a/utils/ethfw/src/app_ethfw.c
+++ b/utils/ethfw/src/app_ethfw.c
@@ -62,6 +62,8 @@
 
 #include "app_ethfw_priv.h"
 
+#define ENABLE_QSGMII_PORTS
+
 /* ========================================================================== */
 /*                            Global Variables                                */
 /* ========================================================================== */

Best regards,

Eric Chen

0 Vineet Roy over 4 years ago in reply to Eric Chen9

TI__Mastermind 37435 points

Hi Eric,

Which SDK version is it ? I will try to reproduce on an EVM.

Regards

Vineet

0 Eric Chen9 over 4 years ago in reply to Vineet Roy

Intellectual 950 points

Hi Vineet,

Thanks for your reply.

We are using SDK 7.0 for both linux and RTOS.

And, I missed a modification in ethfw.

Fullscreen ethfw_modification.txt Download

diff --git a/ethfw_build_flags.mak b/ethfw_build_flags.mak
index 735aec5..a10cd6c 100644
--- a/ethfw_build_flags.mak
+++ b/ethfw_build_flags.mak
@@ -31,9 +31,9 @@ BUILD_R5F_THUMB?=no
 PDK_BUILD_BOARD ?= j721e_evm
 
 # Build TI-RTOS only binaries
-BUILD_APP_TIRTOS?=yes
+BUILD_APP_TIRTOS?=no
 # Build TI-RTOS + Linux binaries
-BUILD_APP_TIRTOS_LINUX?=no
+BUILD_APP_TIRTOS_LINUX?=yes
 #Build Profile
 PROFILE?=release

I am not sure if this modification matters for j7-main-r5f0_0-fw though.

Best regards,

Eric Chen

0 Eric Chen9 over 4 years ago in reply to Eric Chen9

Intellectual 950 points

Hi Vineet,

I found that dorprocboot loads firmware at 0x80080000, but j7-mainr5f0_0-fw needs to be loaded at 0x88000000.

So, I manually load j7-main-r5f0_0-fw in uboot as below.

=> load mmc 1:2 0x88000000 /lib/firmware/j7-main-r5f0_0-fw
22103760 bytes read in 454 ms (46.4 MiB/s)
=> rproc init
=> rproc load 2 0x88000000 0x${filesize}
Load Remote Processor 2 with data@addr=0x88000000 22103760 bytes: Success!
=> rproc start 2
=> boot

Here is the ethfw log.

Enabling clocks for CPSW_9G!
CPSW_9G Test on MAIN NAVSS
CpswMacPort_configSgmii: MAC 1: Configuring SGMII in SGMII_WITH_PHY mode
CpswMacPort_configSgmii: MAC 4: Configuring SGMII in SGMII_WITH_PHY mode
CpswMacPort_configSgmii: MAC 5: Configuring SGMII in SGMII_WITH_PHY mode
CpswMacPort_configSgmii: MAC 6: Configuring SGMII in SGMII_WITH_PHY mode
Remote demo device (core : mcu2_0) .....
Host MAC address: 70:ff:76:1d:92:c2
Host MAC address: 70:ff:76:1d:92:c2
Function:CpswProxyServer_attachExtHandlerCb,HostId:0,CpswType:1
[NIMU_NDK] CPSW has been started successfully

CPSW NIMU application, IP address I/F 1: 192.168.1.203

Function:CpswProxyServer_registerMacHandlerCb,HostId:0,Handle:a212c53c,CoreKey:38acb7e6, MacAddress:70:ff:76:1d:92:c1, FlowIdx:172, FlowIdxOffset:0
Cpsw_ioctlInternal: CPSW: Registered MAC address.ALE entry:11, Policer Entry:0Function:CpswProxyServer_registerIpv4MacHandlerCb,HostId:0,Handle:a212c53c,CoreKey:38acb7e6, MacAddress:70:ff:76:1d:92:c1 IPv4Addr:192.168.1.3

================LLI Table entries===========

Number of Static ARP Entries: 1

SNo.      IP Address         MAC Address
------    -------------      ---------------
1         192.168.1.3        70:FF:76:1D:92:C1

However, I still cannot ping to my PC connected to the Quad Enet Exp Board.

Below is the SGMII status register of 8 external port of CPSW9G.

root@j7-evm:~# devmem2 0x0c000114
/dev/mem opened.
Memory mapped at address 0xffff82f40000.
Read at address  0x0C000114 (0xffff82f40114): 0x00000028
root@j7-evm:~# devmem2 0x0c000214
/dev/mem opened.
Memory mapped at address 0xffff81cd0000.
Read at address  0x0C000214 (0xffff81cd0214): 0x00000038
root@j7-evm:~# devmem2 0x0c000314
/dev/mem opened.
Memory mapped at address 0xffff8f0b0000.
Read at address  0x0C000314 (0xffff8f0b0314): 0x0000002A
root@j7-evm:~# devmem2 0x0c000414
/dev/mem opened.
Memory mapped at address 0xffff94ee0000.
Read at address  0x0C000414 (0xffff94ee0414): 0x0000002C
root@j7-evm:~# devmem2 0x0c000514
/dev/mem opened.
Memory mapped at address 0xffffb86e0000.
Read at address  0x0C000514 (0xffffb86e0514): 0x00000030
root@j7-evm:~# devmem2 0x0c000614
/dev/mem opened.
Memory mapped at address 0xffffb31f0000.
Read at address  0x0C000614 (0xffffb31f0614): 0x00000038
root@j7-evm:~# devmem2 0x0c000714
/dev/mem opened.
Memory mapped at address 0xffffbcc90000.
Read at address  0x0C000714 (0xffffbcc90714): 0x00000038
root@j7-evm:~# devmem2 0x0c000814
/dev/mem opened.
Memory mapped at address 0xffff969a0000.
Read at address  0x0C000814 (0xffff969a0814): 0x0000002A
root@j7-evm:~#

This situation is similar to our custom board, so I think I miss some configuration for SGMII here, could you please help checking?

The difference between EVM and our custom board is as below.

TDA4EVM	custom board
MAC-to-PHY	MAC-to-MAC
load fw from SD card	load fw from eMMC

Best regards,

Eric Chen

0 Prasad Jondhale over 4 years ago in reply to Eric Chen9

TI__Mastermind 27743 points

Hi Eric,

The EthFw logs you shared, are those for your custom board or for TI EVM?
Also does your custom board has same QSGMII PHY as TI EVM?
Please do share your HW schematic showing SGMII connections (you can share via mail if can't be shared here in public domain)

0 Eric Chen9 over 4 years ago in reply to Prasad Jondhale

Intellectual 950 points

Hi Prasad,

Thanks for your reply.

Below are the replies to your questions.

1. The ethfw log above is from TI EVM.

2. On our custom board, we directly connect TDA4 to an ethernet switch through SGMII on port 1 (original QSGMII main) of CPSW9G, so there is no PHY in this path.

Regarding the detail of the modification I made, I will share in my other thread, which focuses on our custom board.

3. I will share the partial schematics in the thread I mentioned above too.

We still can discuss this situation about EVM here if it can help you analyzing.

Best regards,

Eric Chen

0 Prasad Jondhale over 4 years ago in reply to Eric Chen9

TI__Mastermind 27743 points

Hello Eric,

I will close this thread as we have another open (below) for the same issue. We can continue our debug in that thread.

https://e2e.ti.com/support/processors/f/791/p/957751/3565656#3565656

0 Eric Chen9 over 4 years ago in reply to Prasad Jondhale

Intellectual 950 points

Hi Prasad,

Ok, I am fine by this.

Thank you.

Best regards,

Eric Chen

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TDA4VM: SDK7.0 SGMII on EVM is not working