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AM5718: Can't upgrade CPU speed to 1.5GHz

Shine
Genius 13655 points
Part Number: AM5718
Other Parts Discussed in Thread: DRA752

Hello champs,

Customer used his own AM5718 board. He failed to upgrade the CPU speed to 1.5GHz.  

He used debian. He modified mpu_dpll_params_1_5ghz in HW_DATA.C by referencing below website.

https://software-dl.ti.com/processor-sdk-linux/esd/docs/06_03_00_106/linux/How_to_Guides_Linux_Porting_Guide_AM571x_AM570x_Speed_Grades.html


The dpll_mpu_ck is correct but the dpll_mpu_2_ck is only750000000. 


He did a few tests as below:
1. Upgrade the clock to 1.2GHz, the system could run for about 12 hours and then down. M=240,N=3,M2=M3=1;
2. Upgrade the clock to 1.3GHz, the system could run for about half an hour and then down. M=260,N=3,M2=M3=1；
3. Upgrade the clock to 1.4GHz, the system could boot up and then down. M=280,N=3,M2=M3=1；
4. Upgrade the clock to 1.5GHz, the system could not boot up, it always reads the MMC1. M=300,N=3,M2=M3=1；；

Dumping the CM_SLKSEL_DPLL_MPU and CM_DIV_M2_DPLL_MPU registers, both of them are correct. DCC_EN=1,DPLL_BYP_CLKSEL=1. 

All of his boards and the EVM board from Forlinx have the same issue.

Thanks.
Rgds
Shine

  • 0
    TI__Guru**** 163470 points

    Hi Shine,

    I believe you are on latest 6.03 SDK. I did not find the table you mentioned above in the file: arch/arm/mach-omap2/omap5/hw_data.c

    All i found was this:

    /* OPP NOM FREQUENCY for OMAP5 ES2.0, and DRA7 ES1.0 */
    static const struct dpll_params mpu_dpll_params_1ghz[NUM_SYS_CLKS] = {
            {250, 2, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1},         /* 12 MHz   */
            {500, 9, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1},         /* 20 MHz   */
            {119, 1, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1},         /* 16.8 MHz */
            {625, 11, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1},        /* 19.2 MHz */
            {500, 12, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1},        /* 26 MHz   */
            {-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1},       /* 27 MHz   */
            {625, 23, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1},        /* 38.4 MHz */
    };

    May i know how you generated the table for 1.5 GHz?

    Best Regards,
    Keerthy

  • 0 in reply to Keerthy J
    TI__Genius 13655 points

    Dear Keerthy，

    Thanks for your quick reply.

    Customer added the table to hw_data.c. He wrote it according to the struct dpll_params mpu_dpll_params_1ghz table. Since he wanted to upgrade to 1.5GHz and he used 20MHz crystal, he modified the M=300,N=3,M2=M3=1 to get 1.5Ghz CPU clock.

    Thanks.
    Rgds
    Shine

  • 0 in reply to Shine
    TI__Guru*** 125430 points

    Keep in mind that there are more things that must be configured in order to run at 1.5 GHz:

    • Operating voltage will be higher
    • AVS e-fuse settings must be observed
    • ABB e-fuse settings must be observed

    Most of these items are specified in the board.c file.  For example, here's a snippet:

    .mpu.value[OPP_NOM] = VDD_MPU_DRA7_NOM,
    .mpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_MPU_NOM,
    .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
    .mpu.addr = TPS659038_REG_ADDR_SMPS12,
    .mpu.pmic = &tps659038,
    .mpu.abb_tx_done_mask = OMAP_ABB_MPU_TXDONE_MASK,

    I've not tried it personally, but I believe the necessary changes would be:

    1. Add this to your defconfig:

    CONFIG_DRA7_MPU_OPP_HIGH=y

    2. Make changes along these lines in board.c:

    #if defined(CONFIG_DRA7_MPU_OPP_HIGH)

    .mpu.value[OPP_HIGH] = VDD_MPU_DRA7_HIGH,
    .mpu.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_MPU_HIGH,

    #else

    .mpu.value[OPP_NOM] = VDD_MPU_DRA7_NOM,
    .mpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_MPU_NOM,

    #endif

    mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
    .mpu.addr = TPS659038_REG_ADDR_SMPS12,
    .mpu.pmic = &tps659038,
    .mpu.abb_tx_done_mask = OMAP_ABB_MPU_TXDONE_MASK,

    3. Perhaps use a similar #if statement for your dpll changes.

    4. The results should be checked by pausing the boot in u-boot and running a couple of DSS scripts in CCS:

    http://git.ti.com/sitara-dss-files/am57xx-dss-files/blobs/raw/master/am57xx-avs-abb-decode.dss

    http://git.ti.com/sitara-dss-files/am57xx-dss-files/blobs/raw/master/am57xx-ctt.dss

    Each of these will create a file on the desktop with the resulting data that was scraped from the target via jtag. Those will allow us to verify if we have things right with respect to voltages, clocks, ABB, etc. 

    5. Please check the MPU voltage listed for OPP_HIGH in the resulting text file and measure your VDD_MPU rail to see if it matches.

  • 0 in reply to Brad Griffis
    TI__Genius 13655 points

    Hi Brad,

    Thanks for your reply.

    There is no VDD_MPU_DDR7_HIGH definition in uboot, so customer added it ant set it to 1250, but the uboot still can't boot at 1.5GHz. 




    Besides, it seems that the MPU doesn't support OPP_HIGH.




    Thanks.
    Rgds
    Shine

  • 0 in reply to Shine
    TI__Guru**** 163470 points

    Hi Shine,

    AM5718 Data sheet: https://www.ti.com/lit/ds/symlink/am5718.pdf?ts=1608648280616&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FAM5718

    5.5 Operating Performance Points


    AM5718xxX devices support 1.5GHz.

    Best Regards,
    Keerthy

  • 0 in reply to Keerthy J
    TI__Guru*** 125430 points

    I recommend adding #define DEBUG 1 in the file arch/arm/mach-omap2/clocks-common.c so we can get some extra prints related to the voltage.  I'm not positive, but I think in the scale_vcores() function that your value of 1250 gets overwritten with an optimized value based on what's been e-fused into the AVS registers.