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EMIF/VPSS pin multiplexing questions

Anonymous
Anonymous

Hi All,

 

I would like to ask a question on EMIFA pin multiplexing.

 

 

 

 

Please refer to the figure above. Why each of EM_D[0..7] is available from two pins? Is it intended to provide more flexibility to the user?

 

And if the user choose (2) as EMIFA data bus, then there is no pin available for VPBE output, since each of COUT[0..7] signal has only one pin associated. Then what can he do if he still want to communicate with EMIFA devices?

 

Does this mean if one choose (2), then he cannot use VPBE and EMIFA simultaneously?

 

But nor can he choose (1) as EMIFA data bus, since he will have difficulty with

1.      EM_A[13..20] address pins

2.      CCD[8..15] VPFE input pins

 

So why are these important pins all placed together and make it appear difficult to handle?

 

 

 

Zheng

  •  

     

    And why there are also switch S23, and R252, if soldered, to allow B.CI[0..7] (same as CI[0..7]) signals, which are those multiplexed between

    1.      EM_D[0..7]

    2.      EM_A[13..20]

    3.      CI[7..0] (CCD15..8)

    to be used as EM_D[0..7] data? Is it situation (1) described above?

     

     

     

    Zheng

  • The EVM is developed as a general purpose development board, built to accomplish multiple use cases. 

     

    Please answer the questions, so we can better assist you.

    1. What application are your trying to develop ?

    2. What are your system needs -

    peripheral interfaces needed ?

    memory needed ?

    boot mode ?

    device speed and throughput  needs ?

    any audio / video application needs ?

    3. Software needs - codecs, algorithms, etc

    4. Are you working with any local TI FAE ?

     

    Your answers will help us assist you better.

    Thanks.

     

  • Anonymous
    0 Anonymous in reply to Varada Bellary

    Dear Varada,

     

    The basic question is : Why one data (EM_D[0..7]) has two outputs? For sake of flexibility?

     

     

    Zheng

  • Yes. This is pin multiplexing, which reduces the pin count of the device. At the same time, multiple functionality (only one available at a time) can be provided.

    Hope this helps.