This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DRA829V: Mixing PRG0/1 blocks for RGMII routing

Part Number: DRA829V
Other Parts Discussed in Thread: SYSCONFIG

Hi Experts,

I have a custom platform where RGMII interface is routed to a PHY in the following manner

PRG0_RGMII1_TXC          -> PHY_TXC
PRG0_RGMII1_TX_CTL    -> PHY_TX_CTL
PRG0_RGMII1_TD0..TD3  -> PHY_TD0..TD3
PRG1_RGMII1_RXC          -> PHY_RXC
PRG1_RGMII1_RX_CTL    -> PHY_RX_CTL
PRG1_RGMII1_RD0..RD3 -> PHY_RD0..RD3

Please notice how the PRG0 block is used for TX while the PRG1 block is used for RX. When I try to set this up using sysconfig it would either allow me to use all pins from PRG0 block OR all from PRG1 block.

As soon as I switch TD0 to use PRG0

My question is, is that a correct and possible routing scheme to mix the PRG0/1 blocks for one interface?