Howdy,
We have some errors on SPI1 with the DVSDK3 or DVSDK4 and Arago 2.6.32.17 kernel. I see on these forums various solutions which work for some and not for others, on various kernels and devkits.
We've had limited success with SPI1 on our DM365 based custom board, by replacing the SPI0 init code with the SPI1 mux and irq's, since we only need SPI1 and not SPI0. We're communicating between the DM365 master and a MSP430 slave, and the MSP430 is just running a simple echo RX->TX copy on its SPI IRQ handler.
Using the spi_test tool, we can see some of the data we send echoed back, but there are bitshift errors, and it is very dependent on initial conditions whether it works at all...
Multiple runs of the spi_test tool result in either garbled data, or a single-bit shifted data, or the correct data. It can have correct data returned several times in a row, and then fail on the next send... The speed seems to affect the results. If I set the max_speed_hz to 1MHz, the data is always garbled. The minimum 600KHz seems to give the best results, but still has errors.
Any ideas?
Here's a series of results:
./spitest
TX
H e l l o W o r l d
48 65 6C 6C 6F 20 57 6F 72 6C 64 00
RX
H e l l o W o r l d
00 48 65 6C 6C 6F 20 57 6F 72 6C 64
./spitest
TX
H e l l o W o r l d
48 65 6C 6C 6F 20 57 6F 72 6C 64 00
RX
H e l l 7 �
00 48 65 6C 6C 37 00 0A E6 20 03 20
./spitest
spi mode: 0
TX
H e l l o W o r l d
48 65 6C 6C 6F 20 57 6F 72 6C 64 00
RX
� � � o W o r l d
00 20 94 D8 D8 6F 20 57 6F 72 6C 64
changes done:
- removed check for SPI TX intr bit and SPI Buffer Init bit in davinci_spi.c
- substituted SPI1 for SPI0 in mux config, and resource ranges.
- arch/arm/mach-davinci changes to board-dm365 and dm365.c:
static struct spi_board_info dm365_evm_spi_info[] __initconst = {
{
.modalias = "spidev",
.mode = SPI_MODE_0, //one dev per bus |NO_CS
.max_speed_hz = 700 * 1000, //dm365 spi is 600khz-50mhz
.bus_num = 0,
.chip_select = 0,
},
};
static struct davinci_spi_platform_data dm365_spi0_pdata = { .version = SPI_VERSION_2, .num_chipselect = 2, .clk_internal = 1, .cs_hold = 1, .intr_level = 0, .poll_mode = 0, /* 0 -> interrupt mode 1-> polling mode */ .use_dma = 0, /* when 1, value in poll_mode is ignored */ .c2tdelay = 0, .t2cdelay = 0, };
