AM3356: Inquiries about " DDR is in self-refresh " configuration

Takayuki Miyazaki

Part Number: AM3356

Hi Experts,

My customer is developing their system with AM3356(Processor SDK version:06_03_00_106). Customer would like to reduce power consumption. Regarding datasheet Table 5-11 Standby-mode, I received some inquiries.

1) DDR is in self-refresh

Customer would like to configure " DDR is in self-refresh " in Standby mode. Does AM335x already support this in Standby mode? How should customer do this configuration. could you elaborate it, please?

2) eMMC

Customer is using eMMC (u-boot). Customer would like to set eMMC to Low Power Mode. Is Linux-SDK supporting this ? if so, could you teach how customer should do this configuration, please?

3) VDD_MPU = 0.95 V (nom), VDD_CORE = 0.95 V (nom) in Datasheet Table 5-11

According to https://e2e.ti.com/support/processors/f/791/p/952286/3542181#3542181 thread, we understood Linux SDK is not able to control PMIC voltage even if AM335x entered standby mode. Customer also confirmed VDD1 always shows 1.1V and VDD2 always shows 0.95V in both Active mode and Standby mode. Customer is asking how much current is consumed for each VDD_MPU/VDD_CORE in standby mode. Could you clarify them, please?

It will be appreciated if you will share Expert's advice/comments on them.

Best regards,

Miyazaki

over 4 years ago

0 Bin Liu over 4 years ago

TI__Guru*** 148511 points

Hi Miyazaki-san,

Your three questions are in three different expertise domains, which would require multiple experts to provide comments. Unfortunately it is not allowed to assign a single forum thread to multiple engineers.

So is it possible that you break your queries into 3 different posts so that they can be assigned to different experts at the same time? This would help to provide you support much faster.

0 Takayuki Miyazaki over 4 years ago in reply to Bin Liu

TI__Genius 10120 points

Hi Bin,

Thanks for your advice. I will break my customer's questions. This e2e thread is just "DDR is in self-refresh" inquiry, For other questions, I will submit them soon.

Thanks again and best regards,

Miyazaki

0 Bin Liu over 4 years ago in reply to Takayuki Miyazaki

TI__Guru*** 148511 points

Hi Miyazaki-san,

The query has been assigned to the DDR expert. Due to US holidays, the response will be delayed.

0 Brad Griffis over 4 years ago in reply to Bin Liu

TI__Guru*** 125430 points

Miyazaki-san,

To enter standby you execute the following command:

$ echo standby > /sys/power/state

That is documented in the section "Power Management on AM335 and AM437" found in our Linux developer's guide:

http://software-dl.ti.com/processor-sdk-linux/esd/docs/latest/linux/Foundational_Components/Kernel/Kernel_Drivers/Power_Management.html

Are you seeing an issue with entering standby, or were you trying to figure out how to do it?

Best regards,
Brad

0 Takayuki Miyazaki over 4 years ago in reply to Brad Griffis

TI__Genius 10120 points

Hi Brad,

Thank you for your comments. My customer wants to set DDR2 to “self-refresh state” in standby mode. Is AM335x already supporting this? Although I checked "Power Management” section Linux developer's guide, I was not able to see any description for “self-refresh” of DDR.

Best regards,

Miyazaki

0 Brad Griffis over 4 years ago in reply to Takayuki Miyazaki

TI__Guru*** 125430 points

Please see Table 8-13 "Typical Power Modes" from the Technical Reference Manual. The terms "standby" and "DeepSleep0" are defined there. Those terms are used in the power management documentation for Linux that I referenced. Standby specifically involves DDR in self-refresh.

0 Takayuki Miyazaki over 4 years ago in reply to Brad Griffis

TI__Genius 10120 points

Hi Brad,

Please let me confirm it. this means, "DDR in self-refresh" is working by default when AM335x enters Standby/DeepSleep0 mode. therefore, customer does not need to set any configuration. Is that correct?

Best regards,

Miyazaki

0 Takayuki Miyazaki over 4 years ago in reply to Takayuki Miyazaki

TI__Genius 10120 points

Hi Brad,

I received additional information from customer. customer is using the DDR2(http://www.winbond.com/resource-files/w972gg6kb_a03_20170213.pdf). Customer is asking if Linux SDK support " Self Refresh Entry Command" and " Self Refresh Exit Command ". Those commands are described in above datasheet. I'm not sure if those command is general commands or not. Can I have your advice/comments on this, please?

Best regards,

Miyazaki

0 Brad Griffis over 4 years ago in reply to Takayuki Miyazaki

TI__Guru*** 125430 points

I expect it to work. Of course our eval boards all have DDR3 so there is a lot less testing for DDR2. If there is an issue we can work through it.

0 JJD over 4 years ago in reply to Brad Griffis

TI__Guru* 77420 points

Miyazaki, the Self-Refresh Entry and Exit commands described in the DDR2 datasheet are handled by the DDR controller. These are specific hardware sequences the controller uses command the memory in/out of self-refresh. As Brad states, the standby sequences should work with the linux commands provided.

Regards,

James

0 Takayuki Miyazaki over 4 years ago in reply to JJD

TI__Genius 10120 points

Hi James, Brad,

Thank you for your clarification. I shared your Expert’s comments.

I appreciate your help.

Best regards, Miyazaki

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AM3356: Inquiries about " DDR is in self-refresh " configuration