using McBSP to send data in DMA mode, there are two buffers ( out_bufA and out_bufB) working as ping pong output buffer, each buffer contains 512 bytes. Capture the data from serial port by logic analyzer. Found when switching output buffer, the first couple of data are always wrong, and the rest of data are right. Checking the two output buffers, all of the data are correct. Following is my code. can anybody help me solve this problem? thanks a lot.
*(DMPREC) = 0x8C40;
void dmaCha4_init(void)
{
write_dma_reg(DMMCR4,0x4141); //DMA channel 1 mode register
write_dma_reg(DMSFC4,0x2000); //
write_dma_reg(DMSRC4,(unsigned int)&out_bufA[0]); //DMA channel 1 source address register
write_dma_reg(DMDST4,0x23); //DMA channel 1 destination address register
write_dma_reg(DMCTR4, 511); // out_bufA contains 511 bytes
write_dma_reg(DMIDX0,1);
}
void dmaCha4_Enable(void)
{
*(DMPREC) |= 0x0010;
}
void dmaCha4_disable(void)
{
*(DMPREC) &= 0xffef;
}
interrupt void dmaCha4Isr(void)
{
if(Lo == 0)
{
Lo = 1;
write_dma_reg(DMMCR4,0x4141);
write_dma_reg(DMSFC4,0x2000);
write_dma_reg(DMSRC4,(unsigned int)&out_bufA); //DMA channel 1 source address register
write_dma_reg(DMDST4,0x23); //DMA channel 1 destination address register
write_dma_reg(DMCTR4,511); //out_bufA contains 511 bytes
write_dma_reg(DMIDX0,1);
}
else
{
Lo = 0;
write_dma_reg(DMMCR4,0x4141);
write_dma_reg(DMSFC4,0x2000);
write_dma_reg(DMSRC4,(unsigned int)&out_bufB); //DMA channel 1 source address register
write_dma_reg(DMDST4,0x23); //DMA channel 1 destination address register
write_dma_reg(DMCTR4,Num-1); //out_bufB contains 511 bytes
write_dma_reg(DMIDX0,1);
}
dmaCha4_Enable();
McBsp0_Tx_enable();
}
void McBsp0_reset(void)
{
write_Mcbsp0_subreg(SPCR1,0);
write_Mcbsp0_subreg(SPCR2,0);
}
void McBsp0_init(void)
{
write_Mcbsp0_subreg(SPCR1,SPCR10_VAL);
write_Mcbsp0_subreg(SPCR2,SPCR20_VAL);
write_Mcbsp0_subreg(PCR,0x0005);
write_Mcbsp0_subreg(RCR1,0x00a0);
write_Mcbsp0_subreg(RCR2,0x0004);
write_Mcbsp0_subreg(XCR1,0x00a0);
write_Mcbsp0_subreg(XCR2,0x0004);
delay(10);
*(DXR10)=0;
*(DXR20)=0;
}
void McBsp0_Rev_enable(void)
{
write_Mcbsp0_subreg(SPCR1,SPCR10_VAL | 1); /*now enable McBSP receive*/
delay(10);
}
void McBsp0_Tx_enable(void)
{
write_Mcbsp0_subreg(SPCR2,SPCR20_VAL | 1); /*now enable McBSP transmit */
delay(10);
}
void McBsp0_Rev_disable(void)
{
write_Mcbsp0_subreg(SPCR1,SPCR10_VAL & 0); /*now disable McBSP receive*/
delay(10);
}
void McBsp0_Tx_disable(void)
{
write_Mcbsp0_subreg(SPCR2,SPCR20_VAL & 0); /*now disable McBSP transmit */
delay(10);
}