66AK2G12: QSPI Driver hangs up when UART driver is disabled

Scott Morrison2

Part Number: 66AK2G12

Hello,

I have a project that I built with CCS 10.1.1.00004. I am using the following libs:

The K2G talks to a S25FL512S SPI flash chip using the QSPI driver. The K2G also uses Uart0 for communicating with a terminal, currently just for debugging.

I have a test thread that writes dummy data to the SPI flash, reads it back and verifies it. It cycles through several hundred blocks, then erases those blocks, then starts again.

This thread runs fine, for hours, tested overnight, until I try to disable UART0. When I disable UART0, the QSPI driver will hang within a minute or 2. It always hangs in the same spot, during indirect transfer

waiting for the transferComplete semaphore to post. Also, if I switch to single SPI mode, it works fine, the problem only occurs in QSPI mode.

I have the UART PLL configured to run at 384MHz. The UART0 port is at 115200 baud.

I would really appreciate any help/insights into this problem.

Thanks,

Scott

over 4 years ago

0 Scott Morrison2 over 4 years ago

Prodigy 110 points

Sorry, the screen capture image of the library versions did not transfer, here are those versions I mentioned :

XDCTools 3.32.1.22

EDMA3 LLD 2.12.5

IPC 3.46.2.04

SYS/BIOS 6.46.5.55

Sys Analyzer UIA 2.0.6.52

k2g PDK 1.0.7

0 Rahul Prabhu over 4 years ago in reply to Scott Morrison2

TI__Guru** 116170 points

Scott,

Please indicate how are you disabling UART0. It would be good to understand what clock, pinmux and interrupt controller setup is used with your setup to provide appropriate guidance. The UART PLL value is accurate.

Regards,

Rahul

0 Scott Morrison2 over 4 years ago in reply to Rahul Prabhu

Prodigy 110 points

Hi Rahul,

I am initializing the UART through some standard library calls :

bool dmaMode = false;

UART_init();

/* UART SoC init configuration */

UART_initConfig(dmaMode);

/* Use read2/write2 API's in callback mode */

UART_Params_init(&uartParams);

uartParams.baudRate = 115200; //115.2 Kbps ok

uartParams.writeDataMode = UART_DATA_BINARY;

uartParams.readCallback = NULL;

uartParams.readCallback2 = UART0_callback2;

uartParams.readMode = UART_MODE_CALLBACK;

uartParams.writeCallback = NULL;

uartParams.writeCallback2 = UART0_callback2;

uartParams.writeMode = UART_MODE_CALLBACK;

uartParams.parityType = UART_PAR_NONE;

uart0 = UART_open(uart0Instance, &uartParams);

When I ‘disable’ the UART, I simply don’t call the init function which contains the statements above. This causes the QSPI driver to hang up within minutes, if I call the init function, the QSPI will run fine for days.

Our design is very similar to the K2GEVM, except we are using a 25MHz crystal.

I have attached files which have the configuration for the PLL,Clock and pinmux. Please tell me what other files/info I can provide you. I am new to this hardware and tools, so please bear with me.

Thanks for your help,

Scott

Fullscreen evmK2G_clock.c Download

/******************************************************************************
 * Copyright (c) 2015 Texas Instruments Incorporated - http://www.ti.com
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions
 *  are met:
 *
 *    Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *
 *    Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the
 *    distribution.
 *
 *    Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 *****************************************************************************/

#include "board_clock.h"

const pscConfig pscConfigs[] =
{
    {CSL_PSC_PD_DEBUG,          CSL_PSC_LPSC_PMMC},
    {CSL_PSC_PD_DEBUG,          CSL_PSC_LPSC_DEBUG},
    {CSL_PSC_PD_NSS,            CSL_PSC_LPSC_NSS},
    {CSL_PSC_PD_SA,             CSL_PSC_LPSC_SA},
    {CSL_PSC_PD_TERANET,        CSL_PSC_LPSC_TERANET},
    {CSL_PSC_PD_SYS_COMP,       CSL_PSC_LPSC_SYS_COMP},
    {CSL_PSC_PD_SYS_COMP,       CSL_PSC_LPSC_QSPI},
    {CSL_PSC_PD_SYS_COMP,       CSL_PSC_LPSC_MMC},
    {CSL_PSC_PD_SYS_COMP,       CSL_PSC_LPSC_GPMC},
    {CSL_PSC_PD_SYS_COMP,       CSL_PSC_LPSC_MLB},
    {CSL_PSC_PD_SYS_COMP,       CSL_PSC_LPSC_EHRPWM},
    {CSL_PSC_PD_SYS_COMP,       CSL_PSC_LPSC_EQEP},
    {CSL_PSC_PD_SYS_COMP,       CSL_PSC_LPSC_ECAP},
    {CSL_PSC_PD_SYS_COMP,       CSL_PSC_LPSC_MCASP},
    {CSL_PSC_PD_SR,             CSL_PSC_LPSC_SR},
    {CSL_PSC_PD_MSMC,           CSL_PSC_LPSC_MSMC},
    {CSL_PSC_PD_C66X_COREPAC_0, CSL_PSC_LPSC_C66X_COREPAC_0},
    {CSL_PSC_PD_ARM,            CSL_PSC_LPSC_ARM},
    {CSL_PSC_PD_ASRC,           CSL_PSC_LPSC_ASRC},
    {CSL_PSC_PD_ICSS,           CSL_PSC_LPSC_ICSS},
    {CSL_PSC_PD_DSS,            CSL_PSC_LPSC_DSS},
    {CSL_PSC_PD_PCIE,           CSL_PSC_LPSC_PCIE},
    {CSL_PSC_PD_USB,            CSL_PSC_LPSC_USB_0},
    {CSL_PSC_PD_USB,            CSL_PSC_LPSC_USB_1},
    {CSL_PSC_PD_DDR3,           CSL_PSC_LPSC_DDR3}
};

uint32_t Board_getNumPSCconfigs()
{
    return (sizeof(pscConfigs) / sizeof(pscConfig));
}

Fullscreen evmK2G_pll.c Download

/******************************************************************************
 * Copyright (c) 2015 Texas Instruments Incorporated - http://www.ti.com
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions
 *  are met:
 *
 *    Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *
 *    Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the
 *    distribution.
 *
 *    Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 *****************************************************************************/

#include "keystone_pll.h"

const keystonePllcReg keystonePllcRegs[] = {
	{CSL_BOOT_CFG_REGS + 0x350, CSL_BOOT_CFG_REGS + 0x354}, /* system PLL */
	{0                        , 0},                         /* No PA PLL */
	{CSL_BOOT_CFG_REGS + 0x370, CSL_BOOT_CFG_REGS + 0x374}, /* ARM PLL */
	{CSL_BOOT_CFG_REGS + 0x360, CSL_BOOT_CFG_REGS + 0x364}, /* DDR3 PLL */
	{0                        , 0},                         /* No DDR3B PLL */
	{CSL_BOOT_CFG_REGS + 0x358, CSL_BOOT_CFG_REGS + 0x35c}, /* NSS PLL */
	{CSL_BOOT_CFG_REGS + 0x390, CSL_BOOT_CFG_REGS + 0x394}, /* UART PLL */
	{CSL_BOOT_CFG_REGS + 0x380, CSL_BOOT_CFG_REGS + 0x384}, /* DSS PLL */
	{CSL_BOOT_CFG_REGS + 0x388, CSL_BOOT_CFG_REGS + 0x38c}  /* ICSS PLL */
};

/* jowu: changed based on 25MHz crystal, copied from iceK2G
 * The even value of CLKOD(4) causes UART PLL stop */
const pllcConfig pllcConfigs[] = {
    {CSL_PLL_SYS,     96,    1,      4}, /* 600 MHz */
    {CSL_PLL_NSS,    240,    3,      2}, /* 1000 MHz*/
    {CSL_PLL_ARM,     96,    1,      4}, /* 600 MHz*/
    {CSL_PLL_DDR3,   128,    1,     16}, /* 200 MHz, jowu: DDR_CLK_P = DDR_PLLOUT*2 */
//    {CSL_PLL_UART,   384,    5,      5}, /* 384 MHz,  UART PLL not working*/
//    {CSL_PLL_UART,   768,    25,      2}, /* 384 MHz, working*/
    {CSL_PLL_UART,   768,    5,     10}, /* 384 MHz, working*/
//    {CSL_PLL_UART,   767,    5,     10}, /* 383.5 MHz, working */
    {CSL_PLL_DSS,    190,   12,     16}, /* 25 MHz*/
    {CSL_PLL_ICSS,   240,    3,     10}  /* 200 MHz*/
};

uint32_t Board_getNumPllcConfigs()
{
    return (sizeof(pllcConfigs) / sizeof(pllcConfig));
}

Fullscreen 4784.66AK2G0x_pinmux_data.c Download

/**
 * Note: This file was auto-generated by TI PinMux on 5/8/2018 at 5:05:21 PM.
 *
 * \file  66AK2G0x_pinmux_data.c
 *
 * \brief  This file contains the pin mux configurations for the boards.
 *         These are prepared based on how the peripherals are extended on
 *         the boards.
 *
 * \copyright Copyright (CU) 2018 Texas Instruments Incorporated -
 *             http://www.ti.com/
 */

/**
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions
 *  are met:
 *
 *    Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *
 *    Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the
 *    distribution.
 *
 *    Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 */

/* ========================================================================== */
/*                             Include Files                                  */
/* ========================================================================== */
/* #include "csl_types.h" */
#include "types.h"
#include "pinmux.h"
#include "66AK2G0x_pinmux.h"

/** Peripheral Pin Configurations */

#ifndef BUILDCFG_MOD_PWMSS
#define BUILDCFG_MOD_PWMSS
#endif /* BUILDCFG_MOD_PWMSS */

#ifndef BUILDCFG_MOD_I2C
#define BUILDCFG_MOD_I2C
#endif /* BUILDCFG_MOD_I2C */

#ifndef BUILDCFG_MOD_DEBUGSS
#define BUILDCFG_MOD_DEBUGSS
#endif /* BUILDCFG_MOD_DEBUGSS */

#ifndef BUILDCFG_MOD_MCASP
#define BUILDCFG_MOD_MCASP
#endif /* BUILDCFG_MOD_MCASP */

#ifndef BUILDCFG_MOD_UART
#define BUILDCFG_MOD_UART
#endif /* BUILDCFG_MOD_UART */

#ifndef BUILDCFG_MOD_MCSPI
#define BUILDCFG_MOD_MCSPI
#endif /* BUILDCFG_MOD_MCSPI */

#ifndef BUILDCFG_MOD_MMCSD
#define BUILDCFG_MOD_MMCSD
#endif /* BUILDCFG_MOD_MMCSD */

#ifndef BUILDCFG_MOD_GPIO
#define BUILDCFG_MOD_GPIO
#endif /* BUILDCFG_MOD_GPIO */

#ifndef BUILDCFG_MOD_DDR
#define BUILDCFG_MOD_DDR
#endif /* BUILDCFG_MOD_DDR */

#ifndef BUILDCFG_MOD_SYSTEM
#define BUILDCFG_MOD_SYSTEM
#endif /* BUILDCFG_MOD_SYSTEM */

#ifndef BUILDCFG_MOD_QSPI
#define BUILDCFG_MOD_QSPI
#endif /* BUILDCFG_MOD_QSPI */

#ifndef BUILDCFG_MOD_USB
#define BUILDCFG_MOD_USB
#endif /* BUILDCFG_MOD_USB */

#ifndef BUILDCFG_MOD_PRU_ICSS
#define BUILDCFG_MOD_PRU_ICSS
#endif /* BUILDCFG_MOD_PRU_ICSS */


#if defined(BUILDCFG_MOD_PWMSS)

static pinmuxPerCfg_t gPwmss3PinCfg[] =
{
    {
       /* eHRPWM3_OPTIC -> eHRPWM3_A -> A23 */
       PIN_EHRPWM3_A, 0, \
       ( \
           PIN_MODE(4) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {PINMUX_INVALID_PIN}
};

static pinmuxModuleCfg_t gPwmssPinCfg[] =
{
    {3, TRUE, gPwmss3PinCfg},
    {CHIPDB_INVALID_INSTANCE_NUM}
};

#endif /* if defined(BUILDCFG_MOD_PWMSS) */

#if defined(BUILDCFG_MOD_I2C)

static pinmuxPerCfg_t gI2c2PinCfg[] =
{
    {
       /* MyI2C2 -> I2C2_SCL -> V5 */
       PIN_I2C2_SCL, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MyI2C2 -> I2C2_SDA -> V4 */
       PIN_I2C2_SDA, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {PINMUX_INVALID_PIN}
};

static pinmuxModuleCfg_t gI2cPinCfg[] =
{
    {2, TRUE, gI2c2PinCfg},
    {CHIPDB_INVALID_INSTANCE_NUM}
};

#endif /* if defined(BUILDCFG_MOD_I2C) */

#if defined(BUILDCFG_MOD_DEBUGSS)

static pinmuxPerCfg_t gDebugss0PinCfg[] =
{
    {
       /* DEBUGSS -> EMU02 -> N23 */
       PIN_DSS_DATA23, 0, \
       ( \
           PIN_MODE(4) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* DEBUGSS -> EMU03 -> P25 */
       PIN_DSS_DATA22, 0, \
       ( \
           PIN_MODE(4) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* DEBUGSS -> EMU04 -> P24 */
       PIN_DSS_DATA21, 0, \
       ( \
           PIN_MODE(4) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {PINMUX_INVALID_PIN}
};

static pinmuxModuleCfg_t gDebugssPinCfg[] =
{
    {0, TRUE, gDebugss0PinCfg},
    {CHIPDB_INVALID_INSTANCE_NUM}
};

#endif /* if defined(BUILDCFG_MOD_DEBUGSS) */

#if defined(BUILDCFG_MOD_MCASP)

static pinmuxPerCfg_t gMcasp0PinCfg[] =
{
    {
       /* MyMcASP0 -> MCASP0_AHCLKX -> C9 */
       PIN_PR0_PRU1_GPO16, 0, \
       ( \
           PIN_MODE(4) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MyMcASP0 -> MCASP0_ACLKX -> D9 */
       PIN_PR0_PRU1_GPO14, 0, \
       ( \
           PIN_MODE(4) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MyMcASP0 -> MCASP0_AFSX -> C8 */
       PIN_PR0_PRU1_GPO15, 0, \
       ( \
           PIN_MODE(4) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MyMcASP0 -> MCASP0_AHCLKR -> B8 */
       PIN_PR0_PRU1_GPO13, 0, \
       ( \
           PIN_MODE(4) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MyMcASP0 -> MCASP0_ACLKR -> E9 */
       PIN_PR0_PRU1_GPO11, 0, \
       ( \
           PIN_MODE(4) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MyMcASP0 -> MCASP0_AFSR -> A8 */
       PIN_PR0_PRU1_GPO12, 0, \
       ( \
           PIN_MODE(4) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MyMcASP0 -> MCASP0_AXR0 -> B9 */
       PIN_PR0_PRU1_GPO17, 0, \
       ( \
           PIN_MODE(4) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MyMcASP0 -> MCASP0_AXR1 -> A9 */
       PIN_PR0_PRU1_GPO18, 0, \
       ( \
           PIN_MODE(4) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MyMcASP0 -> MCASP0_AXR2 -> B10 */
       PIN_PR0_PRU1_GPO19, 0, \
       ( \
           PIN_MODE(4) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MyMcASP0 -> MCASP0_AXR14 -> B11 */
       PIN_PR1_PRU0_GPO9, 0, \
       ( \
           PIN_MODE(4) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MyMcASP0 -> MCASP0_AXR15 -> B12 */
       PIN_PR1_PRU0_GPO10, 0, \
       ( \
           PIN_MODE(4) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {PINMUX_INVALID_PIN}
};

static pinmuxModuleCfg_t gMcaspPinCfg[] =
{
    {0, TRUE, gMcasp0PinCfg},
    {CHIPDB_INVALID_INSTANCE_NUM}
};

#endif /* if defined(BUILDCFG_MOD_MCASP) */

#if defined(BUILDCFG_MOD_UART)

static pinmuxPerCfg_t gUart0PinCfg[] =
{
    {
       /* UART0_TRACE -> UART0_RXD -> T4 */
       PIN_UART0_RXD, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* UART0_TRACE -> UART0_TXD -> T1 */
       PIN_UART0_TXD, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {PINMUX_INVALID_PIN}
};

static pinmuxPerCfg_t gUart1PinCfg[] =
{
    {
       /* UART1_RemoteConsole -> UART1_RXD -> T3 */
       PIN_UART1_RXD, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* UART1_RemoteConsole -> UART1_TXD -> T5 */
       PIN_UART1_TXD, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {PINMUX_INVALID_PIN}
};

static pinmuxPerCfg_t gUart2PinCfg[] =
{
    {
       /* UART2_BatCharger -> UART2_RXD -> E21 */
       PIN_UART2_RXD, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* UART2_BatCharger -> UART2_TXD -> D21 */
       PIN_UART2_TXD, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {PINMUX_INVALID_PIN}
};

static pinmuxModuleCfg_t gUartPinCfg[] =
{
    {0, TRUE, gUart0PinCfg},
    {1, TRUE, gUart1PinCfg},
    {2, TRUE, gUart2PinCfg},
    {CHIPDB_INVALID_INSTANCE_NUM}
};

#endif /* if defined(BUILDCFG_MOD_UART) */

#if defined(BUILDCFG_MOD_MCSPI)

static pinmuxPerCfg_t gMcspi2PinCfg[] =
{
    {
       /* SPI2_UserInterface -> SPI2_CLK -> R2 */
       PIN_SPI2_CLK, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* SPI2_UserInterface -> SPI2_SOMI -> R4 */
       PIN_SPI2_SOMI, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* SPI2_UserInterface -> SPI2_SIMO -> R3 */
       PIN_SPI2_SIMO, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* SPI2_UserInterface -> SPI2_SCSn0 -> P3 */
       PIN_SPI2_SCSN0, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {PINMUX_INVALID_PIN}
};

static pinmuxModuleCfg_t gMcspiPinCfg[] =
{
    {2, TRUE, gMcspi2PinCfg},
    {CHIPDB_INVALID_INSTANCE_NUM}
};

#endif /* if defined(BUILDCFG_MOD_MCSPI) */

#if defined(BUILDCFG_MOD_MMCSD)

static pinmuxPerCfg_t gMmcsd0PinCfg[] =
{
    {
       /* MMC0_uSD -> MMC0_CLK -> F13 */
       PIN_PR1_PRU0_GPO15, 0, \
       ( \
           PIN_MODE(2) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MMC0_uSD -> MMC0_CMD -> C13 */
       PIN_PR1_PRU0_GPO16, 0, \
       ( \
           PIN_MODE(2) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MMC0_uSD -> MMC0_DAT0 -> B13 */
       PIN_PR1_PRU0_GPO14, 0, \
       ( \
           PIN_MODE(2) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MMC0_uSD -> MMC0_DAT1 -> A13 */
       PIN_PR1_PRU0_GPO13, 0, \
       ( \
           PIN_MODE(2) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MMC0_uSD -> MMC0_DAT2 -> A11 */
       PIN_PR1_PRU0_GPO12, 0, \
       ( \
           PIN_MODE(2) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MMC0_uSD -> MMC0_DAT3 -> A12 */
       PIN_PR1_PRU0_GPO11, 0, \
       ( \
           PIN_MODE(2) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MMC0_uSD -> MMC0_SDCD -> F12 */
       PIN_PR1_PRU0_GPO6, 0, \
       ( \
           PIN_MODE(2) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {PINMUX_INVALID_PIN}
};

static pinmuxModuleCfg_t gMmcsdPinCfg[] =
{
    {0, TRUE, gMmcsd0PinCfg},
    {CHIPDB_INVALID_INSTANCE_NUM}
};

#endif /* if defined(BUILDCFG_MOD_MMCSD) */

#if defined(BUILDCFG_MOD_GPIO)

static pinmuxPerCfg_t gGpio0PinCfg[] =
{
    {
       /* GPIO0 -> GPIO0_10 -> AA20 */
       PIN_GPMC_AD10, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_11 -> AD23 */
       PIN_GPMC_AD11, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_12 -> AA21 */
       PIN_GPMC_AD12, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_13 -> AB21 */
       PIN_GPMC_AD13, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_14 -> AB22 */
       PIN_GPMC_AD14, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_15 -> AA22 */
       PIN_GPMC_AD15, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_16 -> AB23 */
       PIN_GPMC_CLK, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_17 -> AC23 */
       PIN_GPMC_ADVN_ALE, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_18 -> AC22 */
       PIN_GPMC_OEN_REN, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_19 -> Y22 */
       PIN_GPMC_WEN, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_20 -> AC24 */
       PIN_GPMC_BEN0_CLE, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_21 -> AB24 */
       PIN_GPMC_BEN1, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_22 -> Y24 */
       PIN_GPMC_WAIT0, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_23 -> AA24 */
       PIN_GPMC_WAIT1, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_24 -> W25 */
       PIN_GPMC_WPN, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_25 -> AA25 */
       PIN_GPMC_DIR, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_26 -> AB25 */
       PIN_GPMC_CSN0, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_27 -> W24 */
       PIN_GPMC_CSN1, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_28 -> W23 */
       PIN_GPMC_CSN2, 0, \
       ( \
           PIN_MODE(3) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_29 -> Y25 */
       PIN_GPMC_CSN3, 0, \
       ( \
           PIN_MODE(3) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_33 -> N24 */
       PIN_DSS_DATA20, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_34 -> T25 */
       PIN_DSS_DATA19, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_35 -> N22 */
       PIN_DSS_DATA18, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_36 -> R24 */
       PIN_DSS_DATA17, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_37 -> P23 */
       PIN_DSS_DATA16, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_38 -> R22 */
       PIN_DSS_DATA15, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_39 -> U25 */
       PIN_DSS_DATA14, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_40 -> P21 */
       PIN_DSS_DATA13, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_41 -> T24 */
       PIN_DSS_DATA12, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_42 -> V25 */
       PIN_DSS_DATA11, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_43 -> U24 */
       PIN_DSS_DATA10, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_44 -> R21 */
       PIN_DSS_DATA9, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_45 -> T22 */
       PIN_DSS_DATA8, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_46 -> U22 */
       PIN_DSS_DATA7, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_47 -> T21 */
       PIN_DSS_DATA6, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_48 -> V24 */
       PIN_DSS_DATA5, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_49 -> U23 */
       PIN_DSS_DATA4, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_50 -> V23 */
       PIN_DSS_DATA3, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_51 -> W22 */
       PIN_DSS_DATA2, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_52 -> U21 */
       PIN_DSS_DATA1, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_53 -> V22 */
       PIN_DSS_DATA0, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_54 -> R25 */
       PIN_DSS_VSYNC, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_55 -> P22 */
       PIN_DSS_HSYNC, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_56 -> N25 */
       PIN_DSS_PCLK, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_57 -> M25 */
       PIN_DSS_DE, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_58 -> L25 */
       PIN_DSS_FID, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_59 -> G5 */
       PIN_MMC1_DAT7, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_60 -> F4 */
       PIN_MMC1_DAT6, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_61 -> G4 */
       PIN_MMC1_DAT5, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_62 -> E3 */
       PIN_MMC1_DAT4, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_63 -> H4 */
       PIN_MMC1_DAT3, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_64 -> J5 */
       PIN_MMC1_DAT2, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_65 -> F5 */
       PIN_MMC1_DAT1, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_66 -> H3 */
       PIN_MMC1_DAT0, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_67 -> J4 */
       PIN_MMC1_CLK, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_68 -> J2 */
       PIN_MMC1_CMD, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_69 -> J3 */
       PIN_MMC1_SDCD, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_70 -> K3 */
       PIN_MMC1_SDWP, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_71 -> K2 */
       PIN_MMC1_POW, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_72 -> A22 */
       PIN_MII_RXCLK, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_74 -> B22 */
       PIN_EHRPWM3_B, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_75 -> C22 */
       PIN_EHRPWM3_SYNCI, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_76 -> D23 */
       PIN_EHRPWM3_SYNCO, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_77 -> F22 */
       PIN_MII_RXD3, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_78 -> B23 */
       PIN_MII_RXD2, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_79 -> C23 */
       PIN_MII_RXD1, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_80 -> B24 */
       PIN_MII_RXD0, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_81 -> A24 */
       PIN_MII_RXDV, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_82 -> F23 */
       PIN_MII_RXER, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_83 -> B25 */
       PIN_MII_COL, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_84 -> G22 */
       PIN_MII_CRS, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_85 -> C25 */
       PIN_MII_TXCLK, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_86 -> C24 */
       PIN_SPI3_SCSN0, 0, \
       ( \
           PIN_MODE(3) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_87 -> E25 */
       PIN_SPI3_SCSN1, 0, \
       ( \
           PIN_MODE(3) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_88 -> E24 */
       PIN_SPI3_CLK, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_89 -> F25 */
       PIN_SPI3_SOMI, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_90 -> F24 */
       PIN_SPI3_SIMO, 0, \
       ( \
           PIN_MODE(3) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_91 -> D25 */
       PIN_MII_TXD3, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_92 -> G25 */
       PIN_MII_TXD2, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_93 -> G24 */
       PIN_MII_TXD1, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_94 -> G23 */
       PIN_MII_TXD0, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_95 -> H25 */
       PIN_MII_TXEN, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_96 -> H24 */
       PIN_MII_TXER, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_97 -> V3 */
       PIN_MDIO_DATA, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_98 -> U3 */
       PIN_MDIO_CLK, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_99 -> M4 */
       PIN_SPI0_SCSN1, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_100 -> N3 */
       PIN_SPI1_SCSN1, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_102 -> P4 */
       PIN_SPI2_SCSN1, 0, \
       ( \
           PIN_MODE(3) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_106 -> T2 */
       PIN_UART0_CTSN, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_107 -> U1 */
       PIN_UART0_RTSN, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_116 -> E6 */
       PIN_PR0_PRU0_GPO8, 0, \
       ( \
           PIN_MODE(3) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_117 -> C2 */
       PIN_PR0_PRU0_GPO9, 0, \
       ( \
           PIN_MODE(3) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_118 -> C3 */
       PIN_PR0_PRU0_GPO10, 0, \
       ( \
           PIN_MODE(3) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_121 -> B4 */
       PIN_PR0_PRU0_GPO13, 0, \
       ( \
           PIN_MODE(3) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_122 -> A4 */
       PIN_PR0_PRU0_GPO14, 0, \
       ( \
           PIN_MODE(3) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_123 -> E7 */
       PIN_PR0_PRU0_GPO15, 0, \
       ( \
           PIN_MODE(3) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_124 -> D6 */
       PIN_PR0_PRU0_GPO16, 0, \
       ( \
           PIN_MODE(3) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_125 -> C4 */
       PIN_PR0_PRU0_GPO17, 0, \
       ( \
           PIN_MODE(3) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_126 -> C5 */
       PIN_PR0_PRU0_GPO18, 0, \
       ( \
           PIN_MODE(3) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_127 -> A5 */
       PIN_PR0_PRU0_GPO19, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_132 -> C6 */
       PIN_PR0_PRU1_GPO4, 0, \
       ( \
           PIN_MODE(3) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_133 -> E8 */
       PIN_PR0_PRU1_GPO5, 0, \
       ( \
           PIN_MODE(3) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_134 -> A7 */
       PIN_PR0_PRU1_GPO6, 0, \
       ( \
           PIN_MODE(3) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_135 -> D8 */
       PIN_PR0_PRU1_GPO7, 0, \
       ( \
           PIN_MODE(3) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_138 -> C7 */
       PIN_PR0_PRU1_GPO10, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_00 -> AC21 */
       PIN_GPMC_AD0, 0, \
       ( \
           PIN_MODE(3) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_01 -> AE20 */
       PIN_GPMC_AD1, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_02 -> AD22 */
       PIN_GPMC_AD2, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_03 -> AD20 */
       PIN_GPMC_AD3, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_04 -> AE21 */
       PIN_GPMC_AD4, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_05 -> AE22 */
       PIN_GPMC_AD5, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_06 -> AC20 */
       PIN_GPMC_AD6, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_07 -> AD21 */
       PIN_GPMC_AD7, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_08 -> AE23 */
       PIN_GPMC_AD8, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO0 -> GPIO0_09 -> AB20 */
       PIN_GPMC_AD9, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {PINMUX_INVALID_PIN}
};

static pinmuxPerCfg_t gGpio1PinCfg[] =
{
    {
       /* GPIO1 -> GPIO1_10 -> D11 */
       PIN_PR1_PRU0_GPO4, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> GPIO1_11 -> E11 */
       PIN_PR1_PRU0_GPO5, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> GPIO1_13 -> E12 */
       PIN_PR1_PRU0_GPO7, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> GPIO1_14 -> C12 */
       PIN_PR1_PRU0_GPO8, 0, \
       ( \
           PIN_MODE(3) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> GPIO1_23 -> E13 */
       PIN_PR1_PRU0_GPO17, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> GPIO1_24 -> D12 */
       PIN_PR1_PRU0_GPO18, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> GPIO1_25 -> D13 */
       PIN_PR1_PRU0_GPO19, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> GPIO1_26 -> A14 */
       PIN_PR1_PRU1_GPO0, 0, \
       ( \
           PIN_MODE(3) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> GPIO1_27 -> B14 */
       PIN_PR1_PRU1_GPO1, 0, \
       ( \
           PIN_MODE(3) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> GPIO1_28 -> C14 */
       PIN_PR1_PRU1_GPO2, 0, \
       ( \
           PIN_MODE(3) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> GPIO1_29 -> E14 */
       PIN_PR1_PRU1_GPO3, 0, \
       ( \
           PIN_MODE(3) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> GPIO1_30 -> D14 */
       PIN_PR1_PRU1_GPO4, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> GPIO1_31 -> A15 */
       PIN_PR1_PRU1_GPO5, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> GPIO1_32 -> F14 */
       PIN_PR1_PRU1_GPO6, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> GPIO1_33 -> B15 */
       PIN_PR1_PRU1_GPO7, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> GPIO1_34 -> C15 */
       PIN_PR1_PRU1_GPO8, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> GPIO1_35 -> D15 */
       PIN_PR1_PRU1_GPO9, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> GPIO1_36 -> A16 */
       PIN_PR1_PRU1_GPO10, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> GPIO1_37 -> E15 */
       PIN_PR1_PRU1_GPO11, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> GPIO1_38 -> B16 */
       PIN_PR1_PRU1_GPO12, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> GPIO1_39 -> C16 */
       PIN_PR1_PRU1_GPO13, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> GPIO1_40 -> D17 */
       PIN_PR1_PRU1_GPO14, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> GPIO1_41 -> C18 */
       PIN_PR1_PRU1_GPO15, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> GPIO1_42 -> D16 */
       PIN_PR1_PRU1_GPO16, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> GPIO1_43 -> F16 */
       PIN_PR1_PRU1_GPO17, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> GPIO1_44 -> E17 */
       PIN_PR1_PRU1_GPO18, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> GPIO1_45 -> E16 */
       PIN_PR1_PRU1_GPO19, 0, \
       ( \
           PIN_MODE(3) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> GPIO1_46 -> E18 */
       PIN_PR1_MDIO_DATA, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> GPIO1_47 -> D18 */
       PIN_PR1_MDIO_MDCLK, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> GPIO1_50 -> U2 */
       PIN_UART1_CTSN, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> GPIO1_51 -> U4 */
       PIN_UART1_RTSN, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> GPIO1_54 -> D22 */
       PIN_UART2_CTSN, 0, \
       ( \
           PIN_MODE(3) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> GPIO1_55 -> C21 */
       PIN_UART2_RTSN, 0, \
       ( \
           PIN_MODE(3) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> GPIO1_56 -> P5 */
       PIN_DCAN0_TX, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> GPIO1_57 -> R5 */
       PIN_DCAN0_RX, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> GPIO1_65 -> H23 */
       PIN_QSPI_CSN1, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> GPIO1_66 -> H22 */
       PIN_QSPI_CSN2, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> GPIO1_67 -> H21 */
       PIN_QSPI_CSN3, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> GPIO1_04 -> A10 */
       PIN_PR0_MDIO_DATA, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> GPIO1_05 -> C10 */
       PIN_PR0_MDIO_MDCLK, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> GPIO1_06 -> E10 */
       PIN_PR1_PRU0_GPO0, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> GPIO1_07 -> D10 */
       PIN_PR1_PRU0_GPO1, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> GPIO1_08 -> F10 */
       PIN_PR1_PRU0_GPO2, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* GPIO1 -> GPIO1_09 -> C11 */
       PIN_PR1_PRU0_GPO3, 0, \
       ( \
           PIN_MODE(3) | \
           ((0x70000) & (~PIN_PULL_UD_EN & ~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {PINMUX_INVALID_PIN}
};

static pinmuxModuleCfg_t gGpioPinCfg[] =
{
    {0, TRUE, gGpio0PinCfg},
    {1, TRUE, gGpio1PinCfg},
    {CHIPDB_INVALID_INSTANCE_NUM}
};

#endif /* if defined(BUILDCFG_MOD_GPIO) */

#if defined(BUILDCFG_MOD_DDR)

static pinmuxPerCfg_t gDdr0PinCfg[] =
{
    {PINMUX_INVALID_PIN}
};

static pinmuxModuleCfg_t gDdrPinCfg[] =
{
    {0, TRUE, gDdr0PinCfg},
    {CHIPDB_INVALID_INSTANCE_NUM}
};

#endif /* if defined(BUILDCFG_MOD_DDR) */

#if defined(BUILDCFG_MOD_SYSTEM)

static pinmuxPerCfg_t gSystem0PinCfg[] =
{
    {
       /* SYSTEM -> SYSCLKOUT -> M21 */
       PIN_SYSCLKOUT, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* SYSTEM -> LRESETn -> V2 */
       PIN_LRESETN, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* SYSTEM -> LRESETNMIENn -> V1 */
       PIN_LRESETNMIENN, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* SYSTEM -> NMIn -> W1 */
       PIN_NMIN, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {PINMUX_INVALID_PIN}
};

static pinmuxModuleCfg_t gSystemPinCfg[] =
{
    {0, TRUE, gSystem0PinCfg},
    {CHIPDB_INVALID_INSTANCE_NUM}
};

#endif /* if defined(BUILDCFG_MOD_SYSTEM) */

#if defined(BUILDCFG_MOD_QSPI)

static pinmuxPerCfg_t gQspi0PinCfg[] =
{
    {
       /* QSPI_NOR_FLASH -> QSPI_CLK -> K25 */
       PIN_QSPI_CLK, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* QSPI_NOR_FLASH -> QSPI_RCLK -> K24 */
       PIN_QSPI_RCLK, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* QSPI_NOR_FLASH -> QSPI_CSn0 -> J25 */
       PIN_QSPI_CSN0, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* QSPI_NOR_FLASH -> QSPI_D0 -> J23 */
       PIN_QSPI_D0, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* QSPI_NOR_FLASH -> QSPI_D1 -> J22 */
       PIN_QSPI_D1, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* QSPI_NOR_FLASH -> QSPI_D2 -> J21 */
       PIN_QSPI_D2, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* QSPI_NOR_FLASH -> QSPI_D3 -> J24 */
       PIN_QSPI_D3, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {PINMUX_INVALID_PIN}
};

static pinmuxModuleCfg_t gQspiPinCfg[] =
{
    {0, TRUE, gQspi0PinCfg},
    {CHIPDB_INVALID_INSTANCE_NUM}
};

#endif /* if defined(BUILDCFG_MOD_QSPI) */

#if defined(BUILDCFG_MOD_USB)

static pinmuxPerCfg_t gUsb0PinCfg[] =
{
    {
       /* USB0_HOST -> USB0_DRVVBUS -> E19 */
       PIN_USB0_DRVVBUS, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {PINMUX_INVALID_PIN}
};

static pinmuxModuleCfg_t gUsbPinCfg[] =
{
    {0, TRUE, gUsb0PinCfg},
    {CHIPDB_INVALID_INSTANCE_NUM}
};

#endif /* if defined(BUILDCFG_MOD_USB) */

#if defined(BUILDCFG_MOD_PRU_ICSS)

static pinmuxPerCfg_t gPru_icss0PinCfg[] =
{
    {
       /* MyPRU-ICSS0_PRU0 -> pr0_pru0_gpo0 -> D3 */
       PIN_PR0_PRU0_GPO0, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MyPRU-ICSS0_PRU0 -> pr0_pru0_gpo1 -> A2 */
       PIN_PR0_PRU0_GPO1, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MyPRU-ICSS0_PRU0 -> pr0_pru0_gpo2 -> E4 */
       PIN_PR0_PRU0_GPO2, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MyPRU-ICSS0_PRU0 -> pr0_pru0_gpo3 -> B1 */
       PIN_PR0_PRU0_GPO3, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MyPRU-ICSS0_PRU0 -> pr0_pru0_gpo4 -> A3 */
       PIN_PR0_PRU0_GPO4, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MyPRU-ICSS0_PRU0 -> pr0_pru0_gpo5 -> E5 */
       PIN_PR0_PRU0_GPO5, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MyPRU-ICSS0_PRU0 -> pr0_pru0_gpo6 -> B2 */
       PIN_PR0_PRU0_GPO6, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MyPRU-ICSS0_PRU0 -> pr0_pru0_gpo7 -> D4 */
       PIN_PR0_PRU0_GPO7, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MyPRU-ICSS0_PRU0 -> pr0_pru0_gpi11 -> D5 */
       PIN_PR0_PRU0_GPO11, 0, \
       ( \
           PIN_MODE(1) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MyPRU-ICSS0_PRU0 -> pr0_pru0_gpi12 -> B3 */
       PIN_PR0_PRU0_GPO12, 0, \
       ( \
           PIN_MODE(1) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {PINMUX_INVALID_PIN}
};

static pinmuxPerCfg_t gPru_icss1PinCfg[] =
{
    {
       /* MyPRU-ICSS0_PRU1 -> pr0_pru1_gpo8 -> F9 */
       PIN_PR0_PRU1_GPO8, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MyPRU-ICSS0_PRU1 -> pr0_pru1_gpo9 -> B7 */
       PIN_PR0_PRU1_GPO9, 0, \
       ( \
           PIN_MODE(0) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MyPRU-ICSS0_PRU1 -> pr0_pru1_gpi0 -> B5 */
       PIN_PR0_PRU1_GPO0, 0, \
       ( \
           PIN_MODE(1) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MyPRU-ICSS0_PRU1 -> pr0_pru1_gpi1 -> B6 */
       PIN_PR0_PRU1_GPO1, 0, \
       ( \
           PIN_MODE(1) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MyPRU-ICSS0_PRU1 -> pr0_pru1_gpi2 -> D7 */
       PIN_PR0_PRU1_GPO2, 0, \
       ( \
           PIN_MODE(1) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {
       /* MyPRU-ICSS0_PRU1 -> pr0_pru1_gpi3 -> A6 */
       PIN_PR0_PRU1_GPO3, 0, \
       ( \
           PIN_MODE(1) | \
           ((PIN_PULL_UD_EN) & (~PIN_PULL_TYPE_SEL)) \
       ) \
    },
    {PINMUX_INVALID_PIN}
};

static pinmuxModuleCfg_t gPru_icssPinCfg[] =
{
    {0, TRUE, gPru_icss0PinCfg},
    {1, TRUE, gPru_icss1PinCfg},
    {CHIPDB_INVALID_INSTANCE_NUM}
};

#endif /* if defined(BUILDCFG_MOD_PRU_ICSS) */



pinmuxBoardCfg_t gK2G0xPinmuxData[] =
{
#if defined(BUILDCFG_MOD_PWMSS)
    {CHIPDB_MOD_ID_PWMSS, gPwmssPinCfg},
#endif /* if defined(BUILDCFG_MOD_PWMSS) */
#if defined(BUILDCFG_MOD_I2C)
    {CHIPDB_MOD_ID_I2C, gI2cPinCfg},
#endif /* if defined(BUILDCFG_MOD_I2C) */
#if defined(BUILDCFG_MOD_DEBUGSS)
    {CHIPDB_MOD_ID_DEBUGSS, gDebugssPinCfg},
#endif /* if defined(BUILDCFG_MOD_DEBUGSS) */
#if defined(BUILDCFG_MOD_MCASP)
    {CHIPDB_MOD_ID_MCASP, gMcaspPinCfg},
#endif /* if defined(BUILDCFG_MOD_MCASP) */
#if defined(BUILDCFG_MOD_UART)
    {CHIPDB_MOD_ID_UART, gUartPinCfg},
#endif /* if defined(BUILDCFG_MOD_UART) */
#if defined(BUILDCFG_MOD_MCSPI)
    {CHIPDB_MOD_ID_MCSPI, gMcspiPinCfg},
#endif /* if defined(BUILDCFG_MOD_MCSPI) */
#if defined(BUILDCFG_MOD_MMCSD)
    {CHIPDB_MOD_ID_MMCSD, gMmcsdPinCfg},
#endif /* if defined(BUILDCFG_MOD_MMCSD) */
#if defined(BUILDCFG_MOD_GPIO)
    {CHIPDB_MOD_ID_GPIO, gGpioPinCfg},
#endif /* if defined(BUILDCFG_MOD_GPIO) */
#if defined(BUILDCFG_MOD_DDR)
    {CHIPDB_MOD_ID_DDR, gDdrPinCfg},
#endif /* if defined(BUILDCFG_MOD_DDR) */
#if defined(BUILDCFG_MOD_SYSTEM)
    {CHIPDB_MOD_ID_SYSTEM, gSystemPinCfg},
#endif /* if defined(BUILDCFG_MOD_SYSTEM) */
#if defined(BUILDCFG_MOD_QSPI)
    {CHIPDB_MOD_ID_QSPI, gQspiPinCfg},
#endif /* if defined(BUILDCFG_MOD_QSPI) */
#if defined(BUILDCFG_MOD_USB)
    {CHIPDB_MOD_ID_USB, gUsbPinCfg},
#endif /* if defined(BUILDCFG_MOD_USB) */
#if defined(BUILDCFG_MOD_PRU_ICSS)
    {CHIPDB_MOD_ID_PRU_ICSS, gPru_icssPinCfg},
#endif /* if defined(BUILDCFG_MOD_PRU_ICSS) */
    {CHIPDB_MOD_ID_INVALID}
};

0 Rahul Prabhu over 4 years ago in reply to Scott Morrison2

TI__Guru** 116170 points

Hi Scott,

Are you making sure that you have updated the CSL and driver SOC files are updated to use the 25 Mhz clock setting.

If you check the SPI_soc.c file that is provided with the QSPI driver, the input frequency to the QSPI module is hard coded to 48 MHz. This may not be the case when you use 25 Mhz crystal

We do support the 25MHz on K2G ICE reference HW so you can potentially see the the board library settings for K2G ICE for the PLL settings to confirm the 25 MHz settings for UART PLL that drives QSPI interface.

Regards.

Rahul

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