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PROCESSOR-SDK-DRA8X-TDA4X: Sciclient RM Irq set is failing

Part Number: PROCESSOR-SDK-DRA8X-TDA4X

Hi,

We are using Autosar stack from third party vendor which runs on the MCU1_0. The Autosar is running on MCU1_0 standalone without any issue.

Now we want to have communication between Autosar(MCU1_0) and Linux(A72)  so when we ran Autosar with Linux that time facing issue and The issue is Sciclient_rmIrqSet function fails on Autosar code.

Below is the function in Autosar. Here Sciclient_rmIrqSet function fails and goes to infinite loop.

So I want to understand when this Sciclient_rmIrqSet can fails ?

Is there any  interrupt groups or interrupt route number changed between PSDK_6.2 and PSDK_7.0 in sysfw or dmsc or Sciclient side ?

Please give your input and suggestion to fix the issue.

===========================================

void I2C_InterruptConfig(void)
{
  struct tisci_msg_rm_irq_set_req rmIrqReq;
  struct tisci_msg_rm_irq_set_resp rmIrqResp;
  uint32 retVal;

  /*
  * The interrupt path is established using the DMSC firmware
  * for I2C instance 1 on MAIN domin
  */
  rmIrqReq.valid_params           = TISCI_MSG_VALUE_RM_DST_ID_VALID;
  rmIrqReq.valid_params          |= TISCI_MSG_VALUE_RM_DST_HOST_IRQ_VALID;
  rmIrqReq.src_id                 = TISCI_DEV_I2C1;
  rmIrqReq.global_event           = 0U;
  rmIrqReq.src_index              = 0U;
  rmIrqReq.dst_id                 = TISCI_DEV_MCU_R5FSS0_CORE0;
  rmIrqReq.dst_host_irq           = CSLR_MCU_R5FSS0_CORE0_INTR_MAIN2MCU_LVL_INTRTR0_OUTL_0 + 4;
  rmIrqReq.ia_id                  = 0U;
  rmIrqReq.vint                   = 0U;
  rmIrqReq.vint_status_bit_index  = 0U;
  rmIrqReq.secondary_host         = TISCI_MSG_VALUE_RM_UNUSED_SECONDARY_HOST;
  retVal = Sciclient_rmIrqSet(&rmIrqReq, &rmIrqResp, SCICLIENT_SERVICE_WAIT_FOREVER);
  if((uint32)0 != retVal)
  {
    while(1);
  }
}

=======================================

Thanks,

-Makani