Part Number: AM4372
Other Parts Discussed in Thread: TPS65218
Dear processors team,
I am trying to boot Linux from an AM4372-based custom board with eMMC memory.
I have no problems to start SPL from eMMC and also under Linux there are no issues. However, SPL will not use MLO and u-boot.bin to load u-boot from eMMC.
When trying to boot from eMMC, I will get the following error message:
U-Boot SPL 2019.01-g0757f3d81d-dirty (Jan 10 2021 - 11:06:56 +0100) Trying to boot from MMC2 spl: could not find mmc device 1. error: -19 SPL: failed to boot from all boot devices ### ERROR ### Please RESET the board ###
The partition layout of the eMMC is as follows:
=> mmc part Partition Map for MMC device 1 -- Partition Type: DOS Part Start Sector Num Sectors UUID Type 1 2048 81920 015884b5-01 06 Boot 2 83968 3487744 015884b5-02 83 3 3571712 163840 015884b5-03 83 4 3735552 16384 015884b5-04 83
In theory, if I do not use mmcblk1boot0 and mmcblk1boot1 at all, he should just load MLO and u-boot.bin from the first partition (FAT) and be happy, right?
I have tried the follow to get it working:
- Write MLO to /dev/mmcblk1boot0 and u-boot.bin to /dev/mmcblk1boot1 under Linux.
- Use the command sequence indicated in software-dl.ti.com/.../Foundational_Components_U-Boot.html
U-Boot # mmc dev 0 U-Boot # mmc rescan U-Boot # mmc dev 1 U-Boot # fatload mmc 0 0x82000000 MLO U-Boot # mmc write 0x82000000 0x100 0x100 U-Boot # mmc write 0x82000000 0x200 0x100 U-Boot # fatload mmc 0 0x82000000 u-boot.img U-Boot # mmc write 0x82000000 0x300 0x400
For your reference also the pinmux, but I suppose this is correct as the same settings work to access the eMMC from Linux or also from u-boot prompt (if doing the SPL via SD):
static struct module_pin_mux mmc1_pin_mux[] = {
{OFFSET(gpmc_csn1), (MODE(2) | ((PIN_PULL_UD_DIS | PIN_PULL_UP_EN | PIN_RX_ACTIVE | PIN_DS_VALUE_OVERRIDE_EN | PIN_DS_OP_DIS | PIN_DS_PULL_UP_EN) & \
(~PIN_DS_OP_VAL_1 & ~PIN_DS_PULL_UD_EN & ~PIN_WAKE_UP_EN)))},
{OFFSET(gpmc_csn2), (MODE(2) | ((PIN_PULL_UD_DIS | PIN_PULL_UP_EN | PIN_RX_ACTIVE | PIN_DS_VALUE_OVERRIDE_EN | PIN_DS_OP_DIS | PIN_DS_PULL_UP_EN) & \
(~PIN_DS_OP_VAL_1 & ~PIN_DS_PULL_UD_EN & ~PIN_WAKE_UP_EN)))},
{OFFSET(gpmc_ad8), (MODE(2) | ((PIN_PULL_UD_DIS | PIN_PULL_UP_EN | PIN_RX_ACTIVE | PIN_DS_VALUE_OVERRIDE_EN | PIN_DS_OP_DIS | PIN_DS_PULL_UP_EN) & \
(~PIN_DS_OP_VAL_1 & ~PIN_DS_PULL_UD_EN & ~PIN_WAKE_UP_EN)))},
{OFFSET(gpmc_ad9), (MODE(2) | ((PIN_PULL_UD_DIS | PIN_PULL_UP_EN | PIN_RX_ACTIVE | PIN_DS_VALUE_OVERRIDE_EN | PIN_DS_OP_DIS | PIN_DS_PULL_UP_EN) & \
(~PIN_DS_OP_VAL_1 & ~PIN_DS_PULL_UD_EN & ~PIN_WAKE_UP_EN)))},
{OFFSET(gpmc_ad10), (MODE(2) | ((PIN_PULL_UD_DIS | PIN_PULL_UP_EN | PIN_RX_ACTIVE | PIN_DS_VALUE_OVERRIDE_EN | PIN_DS_OP_DIS | PIN_DS_PULL_UP_EN) & \
(~PIN_DS_OP_VAL_1 & ~PIN_DS_PULL_UD_EN & ~PIN_WAKE_UP_EN)))},
{OFFSET(gpmc_ad11), (MODE(2) | ((PIN_PULL_UD_DIS | PIN_PULL_UP_EN | PIN_RX_ACTIVE | PIN_DS_VALUE_OVERRIDE_EN | PIN_DS_OP_DIS | PIN_DS_PULL_UP_EN) & \
(~PIN_DS_OP_VAL_1 & ~PIN_DS_PULL_UD_EN & ~PIN_WAKE_UP_EN)))},
{OFFSET(gpmc_ad12), (MODE(2) | ((PIN_PULL_UD_DIS | PIN_PULL_UP_EN | PIN_RX_ACTIVE | PIN_DS_VALUE_OVERRIDE_EN | PIN_DS_OP_DIS | PIN_DS_PULL_UP_EN) & \
(~PIN_DS_OP_VAL_1 & ~PIN_DS_PULL_UD_EN & ~PIN_WAKE_UP_EN)))},
{OFFSET(gpmc_ad13), (MODE(2) | ((PIN_PULL_UD_DIS | PIN_PULL_UP_EN | PIN_RX_ACTIVE | PIN_DS_VALUE_OVERRIDE_EN | PIN_DS_OP_DIS | PIN_DS_PULL_UP_EN) & \
(~PIN_DS_OP_VAL_1 & ~PIN_DS_PULL_UD_EN & ~PIN_WAKE_UP_EN)))},
{OFFSET(gpmc_ad14), (MODE(2) | ((PIN_PULL_UD_DIS | PIN_PULL_UP_EN | PIN_RX_ACTIVE | PIN_DS_VALUE_OVERRIDE_EN | PIN_DS_OP_DIS | PIN_DS_PULL_UP_EN) & \
(~PIN_DS_OP_VAL_1 & ~PIN_DS_PULL_UD_EN & ~PIN_WAKE_UP_EN)))},
{OFFSET(gpmc_ad15), (MODE(2) | ((PIN_PULL_UD_DIS | PIN_PULL_UP_EN | PIN_RX_ACTIVE | PIN_DS_VALUE_OVERRIDE_EN | PIN_DS_OP_DIS | PIN_DS_PULL_UP_EN) & \
(~PIN_DS_OP_VAL_1 & ~PIN_DS_PULL_UD_EN & ~PIN_WAKE_UP_EN)))},
{OFFSET(mcasp0_fsx), (MODE(4) | ((PIN_PULL_UD_DIS | PIN_PULL_UP_EN | PIN_RX_ACTIVE | PIN_DS_VALUE_OVERRIDE_EN | PIN_DS_OP_DIS | PIN_DS_PULL_UP_EN) & \
(~PIN_DS_OP_VAL_1 & ~PIN_DS_PULL_UD_EN & ~PIN_WAKE_UP_EN)))},
{-1},
};
Regards
Peter