Hi team,
I am posting this question on behalf of my customer. They are using the AM4378 in their designs and are trying to boot the board via serial UART, and the processor gets "locked" during the process. Basically there is no booting without a manual JTAG reset.
I've attached scope captures (during start up) of the rails, PWRONRSTn, input clock CLK_M_OSC, and 32kHz RTC. They are all referenced to the 5VDC_B line (blue). One thing to note is that the VDCDC4 (dc4) droop and the nRESETIN_OUT/GPIO3 droop was resolved as it was found there was an external 3.3V supply that was back-feeding the VDCDC4 rail through a number of pullup resistors elsewhere. They can manually hold PWRONRSTn, WARMRSTn, or nTRST low for longer than the normal hold time and there is still no difference in the bootup.
They also found that resetting the device through JTAG, then asserting WARMRSTn, still outputs the “CCC” prompt, but asserting PWRONRSTn does not. It goes back to its original faulty configuration (which is no "CCC" prompt and an unresponsive processor).
We have the schematics and DSS dumps which can be shared if needed. Comment from the customer-
"Let me know if the DSS dumps are useful at all. I’m not sure when the Tracing vectors get initialized, but they seem to be out of whack with the device options they say they are enabling (NAND, MMC1SD, SPI) not at all what the SYSBOOT settings say they should be. This is BEFORE I connect to the ARM core, so I’m curious if they have any relevance. I can confirm DSS_DATA0-5 do come up to their selected values before PWRONRSTn deasserts."
I'd like to know if you all have any feedback on the captures as well.
Thank you!
Lauren
