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XMC memory protection

Love Westlund Gotby
Prodigy 120 points
Part Number: TDA3XEVM

Hi,

I'm working on adding memory protection to the DSPs on a TDA3 and have some questions. I'm using PDK version 01.10.04.05.

I can successfully add protection to a memory area, using `DSPXMCSetMPAXSegment`, and verify that I get memory exceptions if I try to access the protected memory using either read or write with the corresponding access permission set.

However, after I am done using the memory I would like to remove the access permissions, so that everything "goes back to normal". Is this possible, and if so how can I do it?


So far I have tried with another call to `DSPXMCSetMPAXSegment` but with the size specified as `DSPXMC_SEGSZ_DISABLED` as I interpret it as it would disable that MPAX segment so that it no longer checks any accesses. I have also tried to setup another MPAX segment with a higher ID that should shadow any previous entries on any overlapping memory area. Neither of these approaches have been successful in my testing.

I get errors like

XMC Exception MPFAR=0x8df00fc0 MPFSR=0x110
Security violation, Local L1/L2 cache memory Fault
Supervisor Write violation, Fault ID=0x0
[t=0x0006c0bd] ti.sysbios.family.c64p.Exception: ERROR: F
ti.sysbios.family.c64p.Exception: line 265: E_exceptionMax: pc = 0x8400f6d8, sp = 0x858007f8.
xdc.runtime.Error.raise: terminating execution

when I try to access the relevant memory after first setting restrictive access and then trying to remove it or setting a permissive access according to above.

Thanks in advance,
Love

  • 0
    TI__Guru 50045 points

    Hi,

    You can change the XMC permission as needed.

    However, if the permission is for cache-enabled memory region, you have to flush the L1/L2 cache to make sure the new permission will take effect.

    This is because XMC permission is cached in cache controller.

    Regards,
    Stanley

  • 0 in reply to Stanley Liu
    Prodigy 120 points

    We have made some progress when flushing the entire cache with

    DSPICFGCacheWriteBackInvalidateAll(SOC_DSP_ICFG_BASE, DSPICFG_MEM_L2)

    but invalidating the cache of the area in question with

    DSPICFGCacheWriteBackInvalidate(SOC_DSP_ICFG_BASE, memAddrOfProtectedMemory, sizeOfProtectedMemory)

    does not appear to work as we get memory exceptions. Are we missing something when only flushing this specific range?

    From your previous answer I interpreted it as that I should flush cache after setting permission changes, is this correct, or should it be flushed before setting new permissions?

    Regards,
    Love

  • 0 in reply to Love Westlund Gotby
    TI__Guru 50045 points

    Hi,

    Please refer to the below XMC application note chapter 4.4.1. 

    https://www.ti.com/lit/pdf/sprace2

    Cache Block WriteBack has a slight different implementation than Global WB and it could trigger false XMC error under certain condition. You can find 3 options to avoid this error.

    Regards,
    Stanley