TDA4VM: The way to generate the IPC events

Tsurumoto

Part Number: TDA4VM

I would like to know how to issue IPC events, which are described in the CLEC module of TDA4VM-TRM as follows

TRM(SPRUIL1B)　Table 9-62

I imagine that it is probably used in the same way as the IPC register of the C66, but I can't try it because the address of the IPC register is also unknown.

over 4 years ago

0 Kai Chirca over 4 years ago

TI__Intellectual 2570 points

Dear HaTa,

In C7x, there is a control register called IPER (Inter Processor Event Register). Writing into the lower 16 bits will trigger the IPC events on the same event to CLEC input.

Say, write IPER[1] = 1'b1, c7x_ip_event_1 will be triggered.

Thanks,

Kai

0 Tsurumoto over 4 years ago in reply to Kai Chirca

TI__Genius 15234 points

Hi Kai

Are you referring to the IPE register described on p. 59 and 75 of C71x_CPU_MMA_spruip0.pdf?

It is mentioned in the table, but the usage is not listed. Can you please tell me the specification?

0 Kai Chirca over 4 years ago in reply to Tsurumoto

TI__Intellectual 2570 points

Dear HaTa,

On page 59 and 75, they both showed the access permission is supervisor Write-Only. So to generate the IPC event, do this:

1. Put the CPU in the supervisor mode by using syscall or RETE

2. Write to any bits in the lower 16 bits of IPE register (use MVC .S1 A0, IPE \\ A0 = 64'h1)

Thanks,

Kai

0 Tsurumoto over 4 years ago in reply to Kai Chirca

TI__Genius 15234 points

Hi Kai

Customer understood how to use it. Thank you very much.

If you have a chance to update the TRM next time, please capture this content.

0 Kai Chirca over 4 years ago in reply to Tsurumoto

TI__Intellectual 2570 points

Sure will do. If there is no further questions, can we close this one?

Thanks,

Kai

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TDA4VM: The way to generate the IPC events